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Tom Rinia2f4c912013-08-09 11:22:17 -04001/*
2 * ti_armv7_common.h
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 *
8 * The various ARMv7 SoCs from TI all share a number of IP blocks when
9 * implementing a given feature. Rather than define these in every
10 * board or even SoC common file, we define a common file to be re-used
11 * in all cases. While technically true that some of these details are
12 * configurable at the board design, they are common throughout SoC
13 * reference platforms as well as custom designs and become de facto
14 * standards.
15 */
16
17#ifndef __CONFIG_TI_ARMV7_COMMON_H__
18#define __CONFIG_TI_ARMV7_COMMON_H__
19
20/* Common define for many platforms. */
21#define CONFIG_OMAP
22#define CONFIG_OMAP_COMMON
Tom Riniecf0b652014-04-03 15:17:14 -040023#define CONFIG_SYS_GENERIC_BOARD
Tom Rinia2f4c912013-08-09 11:22:17 -040024
25/*
26 * We typically do not contain NOR flash. In the cases where we do, we
27 * undefine this later.
28 */
29#define CONFIG_SYS_NO_FLASH
30
31/* Support both device trees and ATAGs. */
32#define CONFIG_OF_LIBFDT
33#define CONFIG_CMDLINE_TAG
34#define CONFIG_SETUP_MEMORY_TAGS
35#define CONFIG_INITRD_TAG
36
37/*
38 * Our DDR memory always starts at 0x80000000 and U-Boot shall have
39 * relocated itself to higher in memory by the time this value is used.
Tom Rini96886f22014-03-28 15:03:29 -040040 * However, set this to a 32MB offset to allow for easier Linux kernel
41 * booting as the default is often used as the kernel load address.
42 */
43#define CONFIG_SYS_LOAD_ADDR 0x82000000
44
45/*
46 * We setup defaults based on constraints from the Linux kernel, which should
47 * also be safe elsewhere. We have the default load at 32MB into DDR (for
48 * the kernel), FDT above 128MB (the maximum location for the end of the
49 * kernel), and the ramdisk 512KB above that (allowing for hopefully never
50 * seen large trees). We say all of this must be within the first 256MB
51 * as that will normally be within the kernel lowmem and thus visible via
52 * bootm_size and we only run on platforms with 256MB or more of memory.
Tom Rinia2f4c912013-08-09 11:22:17 -040053 */
Tom Rini96886f22014-03-28 15:03:29 -040054#define DEFAULT_LINUX_BOOT_ENV \
55 "loadaddr=0x82000000\0" \
56 "kernel_addr_r=0x82000000\0" \
57 "fdtaddr=0x88000000\0" \
58 "fdt_addr_r=0x88000000\0" \
59 "rdaddr=0x88080000\0" \
60 "ramdisk_addr_r=0x88080000\0" \
61 "bootm_size=0x10000000\0"
Tom Rinia2f4c912013-08-09 11:22:17 -040062
63/*
64 * Default to a quick boot delay.
65 */
66#define CONFIG_BOOTDELAY 1
67
68/*
Enric Balletbò i Serra07322c52013-12-06 21:30:21 +010069 * DDR information. If the CONFIG_NR_DRAM_BANKS is not defined,
70 * we say (for simplicity) that we have 1 bank, always, even when
71 * we have more. We always start at 0x80000000, and we place the
72 * initial stack pointer in our SRAM. Otherwise, we can define
73 * CONFIG_NR_DRAM_BANKS before including this file.
Tom Rinia2f4c912013-08-09 11:22:17 -040074 */
Enric Balletbò i Serra07322c52013-12-06 21:30:21 +010075#ifndef CONFIG_NR_DRAM_BANKS
Tom Rinia2f4c912013-08-09 11:22:17 -040076#define CONFIG_NR_DRAM_BANKS 1
Enric Balletbò i Serra07322c52013-12-06 21:30:21 +010077#endif
Tom Rinia2f4c912013-08-09 11:22:17 -040078#define CONFIG_SYS_SDRAM_BASE 0x80000000
79#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
80 GENERATED_GBL_DATA_SIZE)
81
82/* Timer information. */
83#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Tom Rinia2f4c912013-08-09 11:22:17 -040084
85/* I2C IP block */
86#define CONFIG_I2C
Tom Rinic5e96362013-08-20 08:53:49 -040087#define CONFIG_CMD_I2C
Heiko Schocherf53f2b82013-10-22 11:03:18 +020088#define CONFIG_SYS_I2C
89#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
90#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
91#define CONFIG_SYS_I2C_OMAP24XX
Tom Rinia2f4c912013-08-09 11:22:17 -040092
93/* MMC/SD IP block */
94#define CONFIG_MMC
95#define CONFIG_GENERIC_MMC
96#define CONFIG_OMAP_HSMMC
97#define CONFIG_CMD_MMC
98
99/* McSPI IP block */
100#define CONFIG_SPI
101#define CONFIG_OMAP3_SPI
Tom Rinibd97be62013-08-09 11:22:19 -0400102#define CONFIG_CMD_SPI
Tom Rinia2f4c912013-08-09 11:22:17 -0400103
104/* GPIO block */
105#define CONFIG_OMAP_GPIO
Tom Rini380c2b72013-08-09 11:22:20 -0400106#define CONFIG_CMD_GPIO
Tom Rinia2f4c912013-08-09 11:22:17 -0400107
108/*
109 * GPMC NAND block. We support 1 device and the physical address to
110 * access CS0 at is 0x8000000.
111 */
112#ifdef CONFIG_NAND
Tom Rinia2f4c912013-08-09 11:22:17 -0400113#define CONFIG_NAND_OMAP_GPMC
Tom Rinie10247f2014-04-03 15:17:15 -0400114#ifndef CONFIG_SYS_NAND_BASE
Tom Rinia2f4c912013-08-09 11:22:17 -0400115#define CONFIG_SYS_NAND_BASE 0x8000000
Tom Rinie10247f2014-04-03 15:17:15 -0400116#endif
Tom Rinia2f4c912013-08-09 11:22:17 -0400117#define CONFIG_SYS_MAX_NAND_DEVICE 1
Tom Rinic5e96362013-08-20 08:53:49 -0400118#define CONFIG_CMD_NAND
Tom Rinia2f4c912013-08-09 11:22:17 -0400119#endif
120
121/*
122 * The following are general good-enough settings for U-Boot. We set a
123 * large malloc pool as we generally have a lot of DDR, and we opt for
124 * function over binary size in the main portion of U-Boot as this is
125 * generally easily constrained later if needed. We enable the config
126 * options that give us information in the environment about what board
127 * we are on so we do not need to rely on the command prompt. We set a
128 * console baudrate of 115200 and use the default baud rate table.
129 */
Simon Glass870d16d2014-06-02 22:04:54 -0600130#define CONFIG_SYS_MALLOC_LEN (16 << 20)
Tom Rinia2f4c912013-08-09 11:22:17 -0400131#define CONFIG_SYS_HUSH_PARSER
Tom Rinic5e96362013-08-20 08:53:49 -0400132#define CONFIG_SYS_PROMPT "U-Boot# "
133#define CONFIG_SYS_CONSOLE_INFO_QUIET
134#define CONFIG_BAUDRATE 115200
135#define CONFIG_ENV_VARS_UBOOT_CONFIG /* Strongly encouraged */
136#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */
137
138/* As stated above, the following choices are optional. */
139#define CONFIG_SYS_LONGHELP
Tom Rinia2f4c912013-08-09 11:22:17 -0400140#define CONFIG_AUTO_COMPLETE
141#define CONFIG_CMDLINE_EDITING
Tom Rinia2f4c912013-08-09 11:22:17 -0400142#define CONFIG_VERSION_VARIABLE
Tom Rinia2f4c912013-08-09 11:22:17 -0400143
144/* We set the max number of command args high to avoid HUSH bugs. */
145#define CONFIG_SYS_MAXARGS 64
146
147/* Console I/O Buffer Size */
148#define CONFIG_SYS_CBSIZE 512
149/* Print Buffer Size */
150#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
151 + sizeof(CONFIG_SYS_PROMPT) + 16)
152/* Boot Argument Buffer Size */
153#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
154
Tom Rinia2f4c912013-08-09 11:22:17 -0400155/*
156 * When we have SPI, NOR or NAND flash we expect to be making use of
157 * mtdparts, both for ease of use in U-Boot and for passing information
158 * on to the Linux kernel.
159 */
160#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND)
161#define CONFIG_MTD_DEVICE /* Required for mtdparts */
162#define CONFIG_CMD_MTDPARTS
163#endif
164
165/*
166 * For commands to use, we take the default list and add a few other
167 * useful commands. Note that we must have set CONFIG_SYS_NO_FLASH
168 * prior to this include, in order to skip a few commands. When we do
169 * have flash, if we expect these commands they must be enabled in that
Tom Rinic5e96362013-08-20 08:53:49 -0400170 * config. If desired, a specific list of desired commands can be used
171 * instead.
Tom Rinia2f4c912013-08-09 11:22:17 -0400172 */
173#include <config_cmd_default.h>
174#define CONFIG_CMD_ASKENV
175#define CONFIG_CMD_ECHO
176#define CONFIG_CMD_BOOTZ
Guillaume GARDETaf02aa12014-11-03 14:26:17 +0100177#define CONFIG_SUPPORT_RAW_INITRD
Tom Rinia2f4c912013-08-09 11:22:17 -0400178
179/*
180 * Common filesystems support. When we have removable storage we
181 * enabled a number of useful commands and support.
182 */
183#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE)
184#define CONFIG_DOS_PARTITION
185#define CONFIG_CMD_FAT
186#define CONFIG_FAT_WRITE
187#define CONFIG_CMD_EXT2
188#define CONFIG_CMD_EXT4
189#define CONFIG_CMD_FS_GENERIC
Nishanth Menon53e42b72014-12-18 14:32:14 -0600190#define CONFIG_PARTITION_UUIDS
191#define CONFIG_CMD_PART
Tom Rinia2f4c912013-08-09 11:22:17 -0400192#endif
193
194/*
195 * Our platforms make use of SPL to initalize the hardware (primarily
196 * memory) enough for full U-Boot to be loaded. We also support Falcon
197 * Mode so that the Linux kernel can be booted directly from SPL
198 * instead, if desired. We make use of the general SPL framework found
199 * under common/spl/. Given our generally common memory map, we set a
200 * number of related defaults and sizes here.
201 */
Sourav Poddar5248bba2014-05-19 16:53:37 -0400202#if !defined(CONFIG_NOR_BOOT) && \
203 !(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX))
Tom Rinia2f4c912013-08-09 11:22:17 -0400204#define CONFIG_SPL_FRAMEWORK
205#define CONFIG_SPL_OS_BOOT
206
207/*
Tom Rinibe737992014-07-18 11:51:32 -0400208 * Place the image at the start of the ROM defined image space (per
209 * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined
210 * downloaded image area. We initalize DRAM as soon as we can so that
211 * we can place stack, malloc and BSS there. We load U-Boot itself into
212 * memory at 0x80800000 for legacy reasons (to not conflict with older
213 * SPLs). We have our BSS be placed 2MiB after this, to allow for the
214 * default Linux kernel address of 0x80008000 to work with most sized
215 * kernels, in the Falcon Mode case. We have the SPL malloc pool at the
Simon Glass0c078ea2015-03-03 08:03:02 -0700216 * end of the BSS area. We suggest that the stack be placed at 32MiB after
217 * the start of DRAM to allow room for all of the above (handled in Kconfig).
Tom Rinia2f4c912013-08-09 11:22:17 -0400218 */
Tom Rinie10247f2014-04-03 15:17:15 -0400219#ifndef CONFIG_SYS_TEXT_BASE
Tom Rinia2f4c912013-08-09 11:22:17 -0400220#define CONFIG_SYS_TEXT_BASE 0x80800000
Tom Rinie10247f2014-04-03 15:17:15 -0400221#endif
222#ifndef CONFIG_SPL_BSS_START_ADDR
Tom Rinia2f4c912013-08-09 11:22:17 -0400223#define CONFIG_SPL_BSS_START_ADDR 0x80a00000
224#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
Tom Rinie10247f2014-04-03 15:17:15 -0400225#endif
226#ifndef CONFIG_SYS_SPL_MALLOC_START
Tom Rinia2f4c912013-08-09 11:22:17 -0400227#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
228 CONFIG_SPL_BSS_MAX_SIZE)
229#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
Tom Rinie10247f2014-04-03 15:17:15 -0400230#endif
Tom Rinia2f4c912013-08-09 11:22:17 -0400231
232/* RAW SD card / eMMC locations. */
233#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
234#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
235
236/* FAT sd card locations. */
Paul Kocialkowski341e8cd2014-11-08 23:14:55 +0100237#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
Guillaume GARDET602a16c2014-10-15 17:53:11 +0200238#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Tom Rinia2f4c912013-08-09 11:22:17 -0400239
240#ifdef CONFIG_SPL_OS_BOOT
Tom Rinia2f4c912013-08-09 11:22:17 -0400241/* FAT */
Guillaume GARDET602a16c2014-10-15 17:53:11 +0200242#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
243#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
Tom Rinia2f4c912013-08-09 11:22:17 -0400244
245/* RAW SD card / eMMC */
246#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
247#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
248#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
249
Tom Rinia2f4c912013-08-09 11:22:17 -0400250/* spl export command */
251#define CONFIG_CMD_SPL
252#endif
253
254#ifdef CONFIG_MMC
Tom Rinif48e5ee2013-08-20 08:53:44 -0400255#define CONFIG_SPL_LIBDISK_SUPPORT
Tom Rinia2f4c912013-08-09 11:22:17 -0400256#define CONFIG_SPL_MMC_SUPPORT
257#define CONFIG_SPL_FAT_SUPPORT
258#endif
259
Tom Rinif48e5ee2013-08-20 08:53:44 -0400260/* General parts of the framework, required. */
Tom Rinia2f4c912013-08-09 11:22:17 -0400261#define CONFIG_SPL_I2C_SUPPORT
262#define CONFIG_SPL_LIBCOMMON_SUPPORT
Tom Rinia2f4c912013-08-09 11:22:17 -0400263#define CONFIG_SPL_LIBGENERIC_SUPPORT
264#define CONFIG_SPL_SERIAL_SUPPORT
265#define CONFIG_SPL_GPIO_SUPPORT
266#define CONFIG_SPL_BOARD_INIT
267
268#ifdef CONFIG_NAND
Tom Rinia2f4c912013-08-09 11:22:17 -0400269#define CONFIG_SPL_NAND_SUPPORT
270#define CONFIG_SPL_NAND_BASE
271#define CONFIG_SPL_NAND_DRIVERS
272#define CONFIG_SPL_NAND_ECC
Tom Rini543c9f12014-03-28 12:03:36 -0400273#define CONFIG_SPL_MTD_SUPPORT
Tom Rinia2f4c912013-08-09 11:22:17 -0400274#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
Tom Rinia2f4c912013-08-09 11:22:17 -0400275#endif
276#endif /* !CONFIG_NOR_BOOT */
277
278#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */