blob: 4ab853f8f566ad5f5fe9895c0b4f5d136aa61e19 [file] [log] [blame]
Stefan Roesea5d182e2007-08-14 14:44:41 +02001/*
2 * (C) Copyright 2007
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
26#include <malloc.h>
27#include <environment.h>
28#include <logbuff.h>
29#include <post.h>
30
31#include <asm/processor.h>
32#include <asm/io.h>
33#include <asm/gpio.h>
34
35DECLARE_GLOBAL_DATA_PTR;
36
37#define REBOOT_MAGIC 0x07081967
38#define REBOOT_NOP 0x00000000
39#define REBOOT_DO_POST 0x00000001
40
41extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
42extern env_t *env_ptr;
43extern uchar default_environment[];
44
45ulong flash_get_size(ulong base, int banknum);
46void env_crc_update(void);
47int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
48
49static u32 start_time;
50
51int board_early_init_f(void)
52{
53 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
54 mtdcr(uicer, 0x00000000); /* disable all ints */
55 mtdcr(uiccr, 0x00000000);
56 mtdcr(uicpr, 0xFFFF7F00); /* set int polarities */
57 mtdcr(uictr, 0x00000000); /* set int trigger levels */
58 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
59 mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
60
61 /*
62 * Configure CPC0_PCI to enable PerWE as output
63 */
64 mtdcr(cpc0_pci, CPC0_PCI_SPE);
65
66 return 0;
67}
68
69int misc_init_r(void)
70{
71 u32 pbcr;
72 int size_val = 0;
73 u32 post_magic;
74 u32 post_val;
75
76 post_magic = in_be32((void *)CFG_POST_MAGIC);
77 post_val = in_be32((void *)CFG_POST_VAL);
78 if ((post_magic == REBOOT_MAGIC) && (post_val == REBOOT_DO_POST)) {
79 /*
80 * Set special bootline bootparameter to pass this POST boot
81 * mode to Linux to reset the username/password
82 */
83 setenv("addmisc", "setenv bootargs \\${bootargs} factory_reset=yes");
84
85 /*
86 * Normally don't run POST tests, only when enabled
87 * via the sw-reset button. So disable further tests
88 * upon next bootup here.
89 */
90 out_be32((void *)CFG_POST_VAL, REBOOT_NOP);
91 } else {
92 /*
93 * Only run POST when initiated via the sw-reset button mechanism
94 */
95 post_word_store(0);
96 }
97
98 /*
99 * Get current time
100 */
101 start_time = get_timer(0);
102
103 /*
104 * FLASH stuff...
105 */
106
107 /* Re-do sizing to get full correct info */
108
109 /* adjust flash start and offset */
110 mfebc(pb0cr, pbcr);
111 switch (gd->bd->bi_flashsize) {
112 case 1 << 20:
113 size_val = 0;
114 break;
115 case 2 << 20:
116 size_val = 1;
117 break;
118 case 4 << 20:
119 size_val = 2;
120 break;
121 case 8 << 20:
122 size_val = 3;
123 break;
124 case 16 << 20:
125 size_val = 4;
126 break;
127 case 32 << 20:
128 size_val = 5;
129 break;
130 case 64 << 20:
131 size_val = 6;
132 break;
133 case 128 << 20:
134 size_val = 7;
135 break;
136 }
137 pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
138 mtebc(pb0cr, pbcr);
139
140 /*
141 * Re-check to get correct base address
142 */
143 flash_get_size(gd->bd->bi_flashstart, 0);
144
145 /* Monitor protection ON by default */
146 (void)flash_protect(FLAG_PROTECT_SET,
147 -CFG_MONITOR_LEN,
148 0xffffffff,
149 &flash_info[0]);
150
151 /* Env protection ON by default */
152 (void)flash_protect(FLAG_PROTECT_SET,
153 CFG_ENV_ADDR_REDUND,
154 CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
155 &flash_info[0]);
156
157 return 0;
158}
159
160/*
161 * Check Board Identity:
162 */
163int checkboard(void)
164{
165 char *s = getenv("serial#");
166
167 puts("Board: Zeus-");
168
169 if (in_be32((void *)GPIO0_IR) & GPIO_VAL(CFG_GPIO_ZEUS_PE))
170 puts("PE");
171 else
172 puts("CE");
173
174 puts(" of BulletEndPoint");
175
176 if (s != NULL) {
177 puts(", serial# ");
178 puts(s);
179 }
180 putc('\n');
181
182 /* both LED's off */
183 gpio_write_bit(CFG_GPIO_LED_RED, 0);
184 gpio_write_bit(CFG_GPIO_LED_GREEN, 0);
185 udelay(10000);
186 /* and on again */
187 gpio_write_bit(CFG_GPIO_LED_RED, 1);
188 gpio_write_bit(CFG_GPIO_LED_GREEN, 1);
189
190 return (0);
191}
192
193static u32 detect_sdram_size(void)
194{
195 u32 val;
196 u32 size;
197
198 mfsdram(mem_mb0cf, val);
199 size = (4 << 20) << ((val & 0x000e0000) >> 17);
200
201 /*
202 * Check if 2nd bank is enabled too
203 */
204 mfsdram(mem_mb1cf, val);
205 if (val & 1)
206 size += (4 << 20) << ((val & 0x000e0000) >> 17);
207
208 return size;
209}
210
211long int initdram (int board_type)
212{
213 return detect_sdram_size();
214}
215
216#if defined(CFG_DRAM_TEST)
217int testdram(void)
218{
219 unsigned long *mem = (unsigned long *)0;
220 const unsigned long kend = (1024 / sizeof(unsigned long));
221 unsigned long k, n;
222 unsigned long msr;
223 unsigned long total_kbytes;
224
225 total_kbytes = detect_sdram_size();
226
227 msr = mfmsr();
228 mtmsr(msr & ~(MSR_EE));
229
230 for (k = 0; k < total_kbytes ;
231 ++k, mem += (1024 / sizeof(unsigned long))) {
232 if ((k & 1023) == 0) {
233 printf("%3d MB\r", k / 1024);
234 }
235
236 memset(mem, 0xaaaaaaaa, 1024);
237 for (n = 0; n < kend; ++n) {
238 if (mem[n] != 0xaaaaaaaa) {
239 printf("SDRAM test fails at: %08x\n",
240 (uint) & mem[n]);
241 return 1;
242 }
243 }
244
245 memset(mem, 0x55555555, 1024);
246 for (n = 0; n < kend; ++n) {
247 if (mem[n] != 0x55555555) {
248 printf("SDRAM test fails at: %08x\n",
249 (uint) & mem[n]);
250 return 1;
251 }
252 }
253 }
254 printf("SDRAM test passes\n");
255 mtmsr(msr);
256
257 return 0;
258}
259#endif
260
261static int default_env_var(char *buf, char *var)
262{
263 char *ptr;
264 char *val;
265
266 /*
267 * Find env variable
268 */
269 ptr = strstr(buf + 4, var);
270 if (ptr == NULL) {
271 printf("ERROR: %s not found!\n", var);
272 return -1;
273 }
274 ptr += strlen(var) + 1;
275
276 /*
277 * Now the ethaddr needs to be updated in the "normal"
278 * environment storage -> redundant flash.
279 */
280 val = ptr;
281 setenv(var, val);
282 printf("Updated %s from eeprom to %s!\n", var, val);
283
284 return 0;
285}
286
287static int restore_default(void)
288{
289 char *buf;
290 char *buf_save;
291 u32 crc;
292
293 /*
294 * Unprotect and erase environment area
295 */
296 flash_protect(FLAG_PROTECT_CLEAR,
297 CFG_ENV_ADDR_REDUND,
298 CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
299 &flash_info[0]);
300
301 flash_sect_erase(CFG_ENV_ADDR_REDUND,
302 CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1);
303
304 /*
305 * Now restore default environment from U-Boot image
306 * -> ipaddr, serverip...
307 */
308 memset(env_ptr, 0, sizeof(env_t));
309 memcpy(env_ptr->data, default_environment, ENV_SIZE);
310#ifdef CFG_REDUNDAND_ENVIRONMENT
311 env_ptr->flags = 0xFF;
312#endif
313 env_crc_update();
314 gd->env_valid = 1;
315
316 /*
317 * Read board specific values from I2C EEPROM
318 * and set env variables accordingly
319 * -> ethaddr, eth1addr, serial#
320 */
321 buf = buf_save = malloc(FACTORY_RESET_ENV_SIZE);
322 if (eeprom_read(FACTORY_RESET_I2C_EEPROM, FACTORY_RESET_ENV_OFFS,
323 (u8 *)buf, FACTORY_RESET_ENV_SIZE)) {
324 puts("\nError reading EEPROM!\n");
325 } else {
326 crc = crc32(0, (u8 *)(buf + 4), FACTORY_RESET_ENV_SIZE - 4);
327 if (crc != *(u32 *)buf) {
328 printf("ERROR: crc mismatch %08lx %08lx\n", crc, *(u32 *)buf);
329 return -1;
330 }
331
332 default_env_var(buf, "ethaddr");
333 buf += 8 + 18;
334 default_env_var(buf, "eth1addr");
335 buf += 9 + 18;
336 default_env_var(buf, "serial#");
337 }
338
339 /*
340 * Finally save updated env variables back to flash
341 */
342 saveenv();
343
344 free(buf_save);
345
346 return 0;
347}
348
349int do_set_default(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
350{
351 char *buf;
352 char *buf_save;
353 char str[32];
354 u32 crc;
355 char var[32];
356
357 if (argc < 4) {
358 puts("ERROR!\n");
359 return -1;
360 }
361
362 buf = buf_save = malloc(FACTORY_RESET_ENV_SIZE);
363 memset(buf, 0, FACTORY_RESET_ENV_SIZE);
364
365 strcpy(var, "ethaddr");
366 printf("Setting %s to %s\n", var, argv[1]);
367 sprintf(str, "%s=%s", var, argv[1]);
368 strcpy(buf + 4, str);
369 buf += strlen(str) + 1;
370
371 strcpy(var, "eth1addr");
372 printf("Setting %s to %s\n", var, argv[2]);
373 sprintf(str, "%s=%s", var, argv[2]);
374 strcpy(buf + 4, str);
375 buf += strlen(str) + 1;
376
377 strcpy(var, "serial#");
378 printf("Setting %s to %s\n", var, argv[3]);
379 sprintf(str, "%s=%s", var, argv[3]);
380 strcpy(buf + 4, str);
381
382 crc = crc32(0, (u8 *)(buf_save + 4), FACTORY_RESET_ENV_SIZE - 4);
383 *(u32 *)buf_save = crc;
384
385 if (eeprom_write(FACTORY_RESET_I2C_EEPROM, FACTORY_RESET_ENV_OFFS,
386 (u8 *)buf_save, FACTORY_RESET_ENV_SIZE)) {
387 puts("\nError writing EEPROM!\n");
388 return -1;
389 }
390
391 free(buf_save);
392
393 return 0;
394}
395
396U_BOOT_CMD(
397 setdef, 4, 1, do_set_default,
398 "setdef - write board-specific values to EEPROM (ethaddr...)\n",
399 "ethaddr eth1addr serial#\n - write board-specific values to EEPROM\n"
400 );
401
402static inline int sw_reset_pressed(void)
403{
404 return !(in_be32((void *)GPIO0_IR) & GPIO_VAL(CFG_GPIO_SW_RESET));
405}
406
407int do_chkreset(cmd_tbl_t* cmdtp, int flag, int argc, char* argv[])
408{
409 int delta;
410 int count = 0;
411 int post = 0;
412 int factory_reset = 0;
413
414 if (!sw_reset_pressed()) {
415 printf("SW-Reset already high (Button released)\n");
416 printf("-> No action taken!\n");
417 return 0;
418 }
419
420 printf("Waiting for SW-Reset button to be released.");
421
422 while (1) {
423 delta = get_timer(start_time);
424 if (!sw_reset_pressed())
425 break;
426
427 if ((delta > CFG_TIME_POST) && !post) {
428 printf("\nWhen released now, POST tests will be started.");
429 gpio_write_bit(CFG_GPIO_LED_GREEN, 0);
430 post = 1;
431 }
432
433 if ((delta > CFG_TIME_FACTORY_RESET) && !factory_reset) {
434 printf("\nWhen released now, factory default values"
435 " will be restored.");
436 gpio_write_bit(CFG_GPIO_LED_RED, 0);
437 factory_reset = 1;
438 }
439
440 udelay(1000);
441 if (!(count++ % 1000))
442 printf(".");
443 }
444
445
446 printf("\nSW-Reset Button released after %d milli-seconds!\n", delta);
447
448 if (delta > CFG_TIME_FACTORY_RESET) {
449 printf("Starting factory reset value restoration...\n");
450
451 /*
452 * Restore default setting
453 */
454 restore_default();
455
456 /*
457 * Reset the board for default to become valid
458 */
459 do_reset(NULL, 0, 0, NULL);
460
461 return 0;
462 }
463
464 if (delta > CFG_TIME_POST) {
465 printf("Starting POST configuration...\n");
466
467 /*
468 * Enable POST upon next bootup
469 */
470 out_be32((void *)CFG_POST_MAGIC, REBOOT_MAGIC);
471 out_be32((void *)CFG_POST_VAL, REBOOT_DO_POST);
472 post_bootmode_init();
473
474 /*
475 * Reset the logbuffer for a clean start
476 */
477 logbuff_reset();
478
479 do_reset(NULL, 0, 0, NULL);
480
481 return 0;
482 }
483
484 return 0;
485}
486
487U_BOOT_CMD (
488 chkreset, 1, 1, do_chkreset,
489 "chkreset- Check for status of SW-reset button and act accordingly\n",
490 NULL
491);
492
493#if defined(CONFIG_POST)
494/*
495 * Returns 1 if keys pressed to start the power-on long-running tests
496 * Called from board_init_f().
497 */
498int post_hotkeys_pressed(void)
499{
500 u32 post_magic;
501 u32 post_val;
502
503 post_magic = in_be32((void *)CFG_POST_MAGIC);
504 post_val = in_be32((void *)CFG_POST_VAL);
505
506 if ((post_magic == REBOOT_MAGIC) && (post_val == REBOOT_DO_POST))
507 return 1;
508 else
509 return 0;
510}
511#endif /* CONFIG_POST */