| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2014 Google, Inc |
| 3 | * |
| 4 | * From Coreboot file cpu/intel/model_206ax/cache_as_ram.inc |
| 5 | * |
| 6 | * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com> |
| 7 | * Copyright (C) 2005 Tyan (written by Yinghai Lu for Tyan) |
| 8 | * Copyright (C) 2007-2008 coresystems GmbH |
| 9 | * Copyright (C) 2012 Kyösti Mälkki <kyosti.malkki@gmail.com> |
| 10 | * |
| 11 | * SPDX-License-Identifier: GPL-2.0 |
| 12 | */ |
| 13 | |
| 14 | #include <common.h> |
| 15 | |
| 16 | /* Note: ebp must not be touched in this code */ |
| 17 | .globl car_init |
| 18 | car_init: |
| 19 | /* TODO: Add cache-as-RAM init here */ |
| 20 | jmp car_init_ret |