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Stelian Pop048bcfb2008-03-26 19:52:30 +01001/*
Stelian Popd57846e2008-05-08 22:52:10 +02002 * [origin: Linux kernel include/asm-arm/arch-at91/at91_rstc.h]
3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
Stelian Pop048bcfb2008-03-26 19:52:30 +01006 *
7 * Reset Controller (RSTC) - System peripherals regsters.
8 * Based on AT91SAM9261 datasheet revision D.
9 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Stelian Pop048bcfb2008-03-26 19:52:30 +010011 */
12
13#ifndef AT91_RSTC_H
14#define AT91_RSTC_H
15
Heiko Schocher62f53f92015-01-21 08:42:53 +010016/* Reset Controller Status Register */
17#define AT91_ASM_RSTC_SR (ATMEL_BASE_RSTC + 0x04)
Eric Benard8e518ec2011-06-06 22:48:26 +000018#define AT91_ASM_RSTC_MR (ATMEL_BASE_RSTC + 0x08)
Jens Scharsig698ad062010-02-03 22:46:01 +010019
20#ifndef __ASSEMBLY__
21
22typedef struct at91_rstc {
23 u32 cr; /* Reset Controller Control Register */
24 u32 sr; /* Reset Controller Status Register */
25 u32 mr; /* Reset Controller Mode Register */
26} at91_rstc_t;
27
28#endif /* __ASSEMBLY__ */
29
30#define AT91_RSTC_KEY 0xA5000000
31
32#define AT91_RSTC_CR_PROCRST 0x00000001
33#define AT91_RSTC_CR_PERRST 0x00000004
34#define AT91_RSTC_CR_EXTRST 0x00000008
35
36#define AT91_RSTC_MR_URSTEN 0x00000001
37#define AT91_RSTC_MR_URSTIEN 0x00000010
38#define AT91_RSTC_MR_ERSTL(x) ((x & 0xf) << 8)
39#define AT91_RSTC_MR_ERSTL_MASK 0x0000FF00
40
41#define AT91_RSTC_SR_NRSTL 0x00010000
42
Roger Meier044a5e82013-11-04 07:40:44 +010043#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
44#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
45#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8)
46#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8)
47#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8)
48#define AT91_RSTC_RSTTYP_USER (4 << 8)
49
Stelian Pop048bcfb2008-03-26 19:52:30 +010050#endif