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git01.mediatek.com / filogic / uboot / 0ae0760ab322836d72fff12daa1491a8bbbd2f4d / . / arch / arm / dts / stm32mp135f-dhcor-dhsbc.dts
blob: fc1c48ad56d24e96ec8e2e6699f4de2768691b5b [file] [log] [blame]
Marek Vasutc3761602024-04-28 00:20:38 +0200[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) 2024 Marek Vasut <marex@denx.de>
4 *
5 * DHCOR STM32MP13 variant:
6 * DHCR-STM32MP135F-C100-R051-EE-F0409-SPI4-RTC-WBT-I-01LG
7 * DHCOR PCB number: 718-100 or newer
8 * DHSBC PCB number: 719-100 or newer
9 */
10
11/dts-v1/;
12
13#include <dt-bindings/regulator/st,stm32mp13-regulator.h>
14#include "stm32mp135.dtsi"
15#include "stm32mp13xf.dtsi"
16#include "stm32mp13xx-dhcor-som.dtsi"
17
18/ {
19 model = "DH electronics STM32MP135F DHCOR DHSBC";
20 compatible = "dh,stm32mp135f-dhcor-dhsbc",
21 "dh,stm32mp135f-dhcor-som",
22 "st,stm32mp135";
23
24 aliases {
25 ethernet0 = &eth1;
26 ethernet1 = &eth2;
27 serial2 = &usart1;
28 serial3 = &usart2;
29 };
30
31 chosen {
32 stdout-path = "serial0:115200n8";
33 };
34};
35
36&adc_1 {
37 pinctrl-names = "default";
38 pinctrl-0 = <&adc1_pins_a &adc1_usb_cc_pins_b>;
39 vdda-supply = <&vdd_adc>;
40 vref-supply = <&vdd_adc>;
41 status = "okay";
42
43 adc1: adc@0 {
44 status = "okay";
45
46 /*
47 * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in2 & in11.
48 * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
49 * 5 * (5.1 + 47kOhms) * 5pF => 1.3us.
50 * Use arbitrary margin here (e.g. 5us).
51 *
52 * The pinmux pins must be set as ANALOG, use datasheet
53 * DS13483 Table 7. STM32MP135C/F ball definitions to
54 * find out which 'pin name' maps to which 'additional
55 * functions', which lists the mapping between pin and
56 * ADC channel. In this case, PA5 maps to ADC1_INP2 and
57 * PF13 maps to ADC1_INP11 .
58 */
59 channel@2 {
60 reg = <2>;
61 st,min-sample-time-ns = <5000>;
62 };
63
64 channel@11 {
65 reg = <11>;
66 st,min-sample-time-ns = <5000>;
67 };
68
69 /* Expansion connector: INP12:pin29 */
70 channel@12 {
71 reg = <12>;
72 st,min-sample-time-ns = <5000>;
73 };
74 };
75};
76
77&eth1 {
78 status = "okay";
79 pinctrl-0 = <&eth1_rgmii_pins_a>;
80 pinctrl-1 = <&eth1_rgmii_sleep_pins_a>;
81 pinctrl-names = "default", "sleep";
82 phy-mode = "rgmii-id";
83 phy-handle = <&ethphy1>;
84 st,ext-phyclk;
85 nvmem-cells = <&ethernet_mac1_address>;
86 nvmem-cell-names = "mac-address";
87
88 mdio1 {
89 #address-cells = <1>;
90 #size-cells = <0>;
91 compatible = "snps,dwmac-mdio";
92
93 ethphy1: ethernet-phy@1 {
94 /* RTL8211F */
95 compatible = "ethernet-phy-id001c.c916",
96 "ethernet-phy-ieee802.3-c22";
97 interrupt-parent = <&gpiog>;
98 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
99 reg = <1>;
100 reset-assert-us = <15000>;
101 reset-deassert-us = <55000>;
102 reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>;
103 };
104 };
105};
106
107&eth2 {
108 status = "okay";
109 pinctrl-0 = <&eth2_rgmii_pins_a>;
110 pinctrl-1 = <&eth2_rgmii_sleep_pins_a>;
111 pinctrl-names = "default", "sleep";
112 phy-mode = "rgmii-id";
113 phy-handle = <&ethphy2>;
114 st,ext-phyclk;
115 nvmem-cells = <&ethernet_mac2_address>;
116 nvmem-cell-names = "mac-address";
117
118 mdio1 {
119 #address-cells = <1>;
120 #size-cells = <0>;
121 compatible = "snps,dwmac-mdio";
122
123 ethphy2: ethernet-phy@1 {
124 /* RTL8211F */
125 compatible = "ethernet-phy-id001c.c916",
126 "ethernet-phy-ieee802.3-c22";
127 interrupt-parent = <&gpiog>;
128 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
129 reg = <1>;
130 reset-assert-us = <15000>;
131 reset-deassert-us = <55000>;
132 reset-gpios = <&gpiog 8 GPIO_ACTIVE_LOW>;
133 };
134 };
135};
136
137&gpioa {
138 gpio-line-names = "", "", "", "",
139 "", "DHSBC_USB_PWR_CC1", "", "",
140 "", "", "", "DHSBC_nETH1_RST",
141 "", "DHCOR_HW-CODING_0", "", "";
142};
143
144&gpiob {
145 gpio-line-names = "", "", "", "",
146 "", "", "", "DHCOR_BT_HOST_WAKE",
147 "", "", "", "",
148 "", "DHSBC_nTPM_CS", "", "";
149};
150
151&gpioc {
152 gpio-line-names = "", "", "", "DHSBC_USB_5V_MEAS",
153 "", "", "", "",
154 "", "", "", "",
155 "", "", "", "";
156};
157
158&gpiod {
159 gpio-line-names = "", "", "", "",
160 "", "DHCOR_RAM-CODING_0", "", "",
161 "", "DHCOR_RAM-CODING_1", "", "",
162 "", "", "", "";
163};
164
165&gpioe {
166 gpio-line-names = "", "", "", "",
167 "", "", "", "",
168 "", "DHSBC_nTPM_RST", "", "",
169 "DHSBC_nTPM_PIRQ", "", "DHCOR_WL_HOST_WAKE", "";
170};
171
172&gpiof {
173 gpio-line-names = "", "", "DHSBC_USB_PWR_nFLT", "",
174 "", "", "", "",
175 "", "", "", "",
176 "DHCOR_WL_REG_ON", "DHSBC_USB_PWR_CC2", "", "";
177};
178
179&gpiog {
180 gpio-line-names = "", "", "", "",
181 "", "", "", "",
182 "DHSBC_nETH2_RST", "DHCOR_BT_DEV_WAKE", "", "",
183 "DHSBC_ETH1_INTB", "", "", "DHSBC_ETH2_INTB";
184};
185
186&gpioi {
187 gpio-line-names = "DHCOR_RTC_nINT", "DHCOR_HW-CODING_1",
188 "DHCOR_BT_REG_ON", "DHCOR_PMIC_nINT",
189 "DHSBC_BOOT0", "DHSBC_BOOT1",
190 "DHSBC_BOOT2", "DHSBC_USB-C_DATA_VBUS";
191};
192
193&i2c1 { /* Expansion connector: SDA:pin27 SCL:pin28 */
194 pinctrl-names = "default", "sleep";
195 pinctrl-0 = <&i2c1_pins_a>;
196 pinctrl-1 = <&i2c1_sleep_pins_a>;
197 i2c-scl-rising-time-ns = <96>;
198 i2c-scl-falling-time-ns = <3>;
199 clock-frequency = <400000>;
200 status = "okay";
201 /* spare dmas for other usage */
202 /delete-property/dmas;
203 /delete-property/dma-names;
204};
205
206&i2c5 { /* Expansion connector: SDA:pin3 SCL:pin5 */
207 pinctrl-names = "default", "sleep";
208 pinctrl-0 = <&i2c5_pins_b>;
209 pinctrl-1 = <&i2c5_sleep_pins_b>;
210 i2c-scl-rising-time-ns = <96>;
211 i2c-scl-falling-time-ns = <3>;
212 clock-frequency = <400000>;
213 status = "okay";
214 /* spare dmas for other usage */
215 /delete-property/dmas;
216 /delete-property/dma-names;
217};
218
219&m_can1 { /* Expansion connector: TX:pin16 RX:pin18 */
220 pinctrl-names = "default", "sleep";
221 pinctrl-0 = <&m_can1_pins_a>;
222 pinctrl-1 = <&m_can1_sleep_pins_a>;
223 status = "okay";
224};
225
226&m_can2 { /* Expansion connector: TX:pin22 RX:pin26 */
227 pinctrl-names = "default", "sleep";
228 pinctrl-0 = <&m_can2_pins_a>;
229 pinctrl-1 = <&m_can2_sleep_pins_a>;
230 status = "okay";
231};
232
233&pwr_regulators {
234 vdd-supply = <&vdd>;
235 vdd_3v3_usbfs-supply = <&vdd_usb>;
236 status = "okay";
237};
238
239&sai1 { /* Expansion connector: SCK-A:pin12 FS-A:pin35 SD-A:pin38 SD-B:pin40 */
240 clocks = <&rcc SAI1>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
241 clock-names = "pclk", "x8k", "x11k";
242 pinctrl-names = "default", "sleep";
243 pinctrl-0 = <&sai1a_pins_a &sai1b_pins_a>;
244 pinctrl-1 = <&sai1a_sleep_pins_a &sai1b_sleep_pins_a>;
245};
246
247&scmi_voltd {
248 status = "disabled";
249};
250
251&spi2 {
252 pinctrl-names = "default", "sleep";
253 pinctrl-0 = <&spi2_pins_a>;
254 pinctrl-1 = <&spi2_sleep_pins_a>;
255 cs-gpios = <&gpiob 13 0>;
256 status = "okay";
257
258 st33htph: tpm@0 {
259 compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
260 reg = <0>;
261 spi-max-frequency = <24000000>;
262 };
263};
264
265&spi3 { /* Expansion connector: MOSI:pin19 MISO:pin21 SCK:pin22 nCS:pin24 */
266 pinctrl-names = "default", "sleep";
267 pinctrl-0 = <&spi3_pins_a>;
268 pinctrl-1 = <&spi3_sleep_pins_a>;
269 cs-gpios = <&gpiof 3 0>;
270 status = "disabled";
271};
272
273&timers5 { /* Expansion connector: CH3:pin31 */
274 /delete-property/dmas;
275 /delete-property/dma-names;
276 status = "okay";
277
278 pwm {
279 pinctrl-0 = <&pwm5_pins_a>;
280 pinctrl-1 = <&pwm5_sleep_pins_a>;
281 pinctrl-names = "default", "sleep";
282 status = "okay";
283 };
284 timer@4 {
285 status = "okay";
286 };
287};
288
289&timers13 { /* Expansion connector: CH1:pin32 */
290 /delete-property/dmas;
291 /delete-property/dma-names;
292 status = "okay";
293
294 pwm {
295 pinctrl-0 = <&pwm13_pins_a>;
296 pinctrl-1 = <&pwm13_sleep_pins_a>;
297 pinctrl-names = "default", "sleep";
298 status = "okay";
299 };
300 timer@12 {
301 status = "okay";
302 };
303};
304
305&usart1 { /* Expansion connector: RX:pin33 TX:pin37 */
306 pinctrl-names = "default", "sleep", "idle";
307 pinctrl-0 = <&usart1_pins_b>;
308 pinctrl-1 = <&usart1_sleep_pins_b>;
309 pinctrl-2 = <&usart1_idle_pins_b>;
310 status = "okay";
311};
312
313&usart2 { /* Expansion connector: RX:pin10 TX:pin8 RTS:pin11 CTS:pin36 */
314 pinctrl-names = "default", "sleep", "idle";
315 pinctrl-0 = <&usart2_pins_b>;
316 pinctrl-1 = <&usart2_sleep_pins_b>;
317 pinctrl-2 = <&usart2_idle_pins_b>;
318 uart-has-rtscts;
319 status = "okay";
320};
321
322&usbh_ehci {
323 phys = <&usbphyc_port0>;
324 status = "okay";
325};
326
327&usbh_ohci {
328 phys = <&usbphyc_port0>;
329 status = "okay";
330};
331
332&usbotg_hs {
333 dr_mode = "peripheral";
334 phys = <&usbphyc_port1 0>;
335 phy-names = "usb2-phy";
336 usb33d-supply = <&usb33>;
337 status = "okay";
338};
339
340&usbphyc {
341 status = "okay";
342 vdda1v1-supply = <&reg11>;
343 vdda1v8-supply = <&reg18>;
344};
345
346&usbphyc_port0 {
347 phy-supply = <&vdd_usb>;
348 st,current-boost-microamp = <1000>;
349 st,decrease-hs-slew-rate;
350 st,tune-hs-dc-level = <2>;
351 st,enable-hs-rftime-reduction;
352 st,trim-hs-current = <11>;
353 st,trim-hs-impedance = <2>;
354 st,tune-squelch-level = <1>;
355 st,enable-hs-rx-gain-eq;
356 st,no-hs-ftime-ctrl;
357 st,no-lsfs-sc;
358 connector {
359 compatible = "usb-a-connector";
360 vbus-supply = <&vbus_sw>;
361 };
362};
363
364&usbphyc_port1 {
365 phy-supply = <&vdd_usb>;
366 st,current-boost-microamp = <1000>;
367 st,decrease-hs-slew-rate;
368 st,tune-hs-dc-level = <2>;
369 st,enable-hs-rftime-reduction;
370 st,trim-hs-current = <11>;
371 st,trim-hs-impedance = <2>;
372 st,tune-squelch-level = <1>;
373 st,enable-hs-rx-gain-eq;
374 st,no-hs-ftime-ctrl;
375 st,no-lsfs-sc;
376 connector {
377 compatible = "gpio-usb-b-connector", "usb-b-connector";
378 vbus-gpios = <&gpioi 7 GPIO_ACTIVE_HIGH>;
379 label = "Type-C";
380 self-powered;
381 type = "micro";
382 };
383};