Heiko Schocher | dd68a1d | 2013-08-05 16:00:38 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. |
| 3 | * Based on: |
| 4 | * U-Boot:board/davinci/da8xxevm/da850evm.c |
| 5 | * |
| 6 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ |
| 7 | * |
| 8 | * Based on da830evm.c. Original Copyrights follow: |
| 9 | * |
| 10 | * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> |
| 11 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> |
| 12 | * |
| 13 | * SPDX-License-Identifier: GPL-2.0+ |
| 14 | */ |
| 15 | |
| 16 | #include <common.h> |
| 17 | #include <i2c.h> |
| 18 | #include <net.h> |
| 19 | #include <netdev.h> |
| 20 | #include <spi.h> |
| 21 | #include <spi_flash.h> |
| 22 | #include <asm/arch/hardware.h> |
Khoronzhuk, Ivan | 753a00a | 2014-06-07 04:22:52 +0300 | [diff] [blame] | 23 | #include <asm/ti-common/davinci_nand.h> |
Heiko Schocher | dd68a1d | 2013-08-05 16:00:38 +0200 | [diff] [blame] | 24 | #include <asm/arch/emac_defs.h> |
| 25 | #include <asm/arch/pinmux_defs.h> |
| 26 | #include <asm/io.h> |
| 27 | #include <asm/arch/davinci_misc.h> |
Masahiro Yamada | 56a931c | 2016-09-21 11:28:55 +0900 | [diff] [blame] | 28 | #include <linux/errno.h> |
Heiko Schocher | dd68a1d | 2013-08-05 16:00:38 +0200 | [diff] [blame] | 29 | #include <asm/gpio.h> |
| 30 | #include <hwconfig.h> |
| 31 | #include <bootstage.h> |
Simon Glass | 0ffb9d6 | 2017-05-31 19:47:48 -0600 | [diff] [blame] | 32 | #include <asm/mach-types.h> |
Heiko Schocher | dd68a1d | 2013-08-05 16:00:38 +0200 | [diff] [blame] | 33 | |
| 34 | DECLARE_GLOBAL_DATA_PTR; |
| 35 | |
| 36 | #ifdef CONFIG_DRIVER_TI_EMAC |
| 37 | #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII |
| 38 | #define HAS_RMII 1 |
| 39 | #else |
| 40 | #define HAS_RMII 0 |
| 41 | #endif |
| 42 | #endif /* CONFIG_DRIVER_TI_EMAC */ |
| 43 | |
| 44 | void dsp_lpsc_on(unsigned domain, unsigned int id) |
| 45 | { |
| 46 | dv_reg_p mdstat, mdctl, ptstat, ptcmd; |
| 47 | struct davinci_psc_regs *psc_regs; |
| 48 | |
| 49 | psc_regs = davinci_psc0_regs; |
| 50 | mdstat = &psc_regs->psc0.mdstat[id]; |
| 51 | mdctl = &psc_regs->psc0.mdctl[id]; |
| 52 | ptstat = &psc_regs->ptstat; |
| 53 | ptcmd = &psc_regs->ptcmd; |
| 54 | |
| 55 | while (*ptstat & (0x1 << domain)) |
| 56 | ; |
| 57 | |
| 58 | if ((*mdstat & 0x1f) == 0x03) |
| 59 | return; /* Already on and enabled */ |
| 60 | |
| 61 | *mdctl |= 0x03; |
| 62 | |
| 63 | *ptcmd = 0x1 << domain; |
| 64 | |
| 65 | while (*ptstat & (0x1 << domain)) |
| 66 | ; |
| 67 | while ((*mdstat & 0x1f) != 0x03) |
| 68 | ; /* Probably an overkill... */ |
| 69 | } |
| 70 | |
| 71 | static void dspwake(void) |
| 72 | { |
| 73 | unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE; |
| 74 | u32 val; |
| 75 | |
| 76 | /* if the device is ARM only, return */ |
| 77 | if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10) |
| 78 | return; |
| 79 | |
| 80 | if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL)) |
| 81 | return; |
| 82 | |
| 83 | *resetvect++ = 0x1E000; /* DSP Idle */ |
| 84 | /* clear out the next 10 words as NOP */ |
| 85 | memset(resetvect, 0, sizeof(unsigned) * 10); |
| 86 | |
| 87 | /* setup the DSP reset vector */ |
| 88 | writel(DAVINCI_L3CBARAM_BASE, HOST1CFG); |
| 89 | |
| 90 | dsp_lpsc_on(1, DAVINCI_LPSC_GEM); |
| 91 | val = readl(PSC0_MDCTL + (15 * 4)); |
| 92 | val |= 0x100; |
| 93 | writel(val, (PSC0_MDCTL + (15 * 4))); |
| 94 | } |
| 95 | |
| 96 | int misc_init_r(void) |
| 97 | { |
| 98 | dspwake(); |
| 99 | return 0; |
| 100 | } |
| 101 | |
| 102 | static const struct pinmux_config gpio_pins[] = { |
| 103 | /* GP7[14] selects bootmode*/ |
| 104 | { pinmux(16), 8, 3 }, /* GP7[14] */ |
| 105 | }; |
| 106 | |
| 107 | const struct pinmux_resource pinmuxes[] = { |
| 108 | #ifdef CONFIG_DRIVER_TI_EMAC |
| 109 | PINMUX_ITEM(emac_pins_mdio), |
| 110 | #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII |
| 111 | PINMUX_ITEM(emac_pins_rmii), |
| 112 | #else |
| 113 | PINMUX_ITEM(emac_pins_mii), |
| 114 | #endif |
| 115 | #endif |
| 116 | PINMUX_ITEM(uart2_pins_txrx), |
| 117 | PINMUX_ITEM(uart2_pins_rtscts), |
| 118 | PINMUX_ITEM(uart0_pins_txrx), |
| 119 | PINMUX_ITEM(uart0_pins_rtscts), |
| 120 | #ifdef CONFIG_NAND_DAVINCI |
| 121 | PINMUX_ITEM(emifa_pins_cs3), |
| 122 | PINMUX_ITEM(emifa_pins_nand), |
| 123 | #endif |
| 124 | PINMUX_ITEM(gpio_pins), |
| 125 | }; |
| 126 | |
| 127 | const int pinmuxes_size = ARRAY_SIZE(pinmuxes); |
| 128 | |
| 129 | const struct lpsc_resource lpsc[] = { |
| 130 | { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ |
| 131 | { DAVINCI_LPSC_EMAC }, /* image download */ |
| 132 | { DAVINCI_LPSC_UART2 }, /* console */ |
| 133 | { DAVINCI_LPSC_UART0 }, /* console */ |
| 134 | { DAVINCI_LPSC_GPIO }, |
| 135 | }; |
| 136 | |
| 137 | const int lpsc_size = ARRAY_SIZE(lpsc); |
| 138 | |
| 139 | #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK |
| 140 | #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000 |
| 141 | #endif |
| 142 | |
| 143 | #define REV_AM18X_EVM 0x100 |
| 144 | |
| 145 | /* |
| 146 | * get_board_rev() - setup to pass kernel board revision information |
| 147 | * Returns: |
| 148 | * bit[0-3] Maximum cpu clock rate supported by onboard SoC |
| 149 | * 0000b - 300 MHz |
| 150 | * 0001b - 372 MHz |
| 151 | * 0010b - 408 MHz |
| 152 | * 0011b - 456 MHz |
| 153 | */ |
| 154 | u32 get_board_rev(void) |
| 155 | { |
| 156 | char *s; |
| 157 | u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK; |
| 158 | u32 rev = 0; |
| 159 | |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 160 | s = env_get("maxcpuclk"); |
Heiko Schocher | dd68a1d | 2013-08-05 16:00:38 +0200 | [diff] [blame] | 161 | if (s) |
| 162 | maxcpuclk = simple_strtoul(s, NULL, 10); |
| 163 | |
| 164 | if (maxcpuclk >= 456000000) |
| 165 | rev = 3; |
| 166 | else if (maxcpuclk >= 408000000) |
| 167 | rev = 2; |
| 168 | else if (maxcpuclk >= 372000000) |
| 169 | rev = 1; |
| 170 | #ifdef CONFIG_DA850_AM18X_EVM |
| 171 | rev |= REV_AM18X_EVM; |
| 172 | #endif |
| 173 | return rev; |
| 174 | } |
| 175 | |
| 176 | int board_early_init_f(void) |
| 177 | { |
| 178 | /* |
| 179 | * Power on required peripherals |
| 180 | * ARM does not have access by default to PSC0 and PSC1 |
| 181 | * assuming here that the DSP bootloader has set the IOPU |
| 182 | * such that PSC access is available to ARM |
| 183 | */ |
| 184 | if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) |
| 185 | return 1; |
| 186 | |
| 187 | return 0; |
| 188 | } |
| 189 | |
| 190 | int board_init(void) |
| 191 | { |
Heiko Schocher | dd68a1d | 2013-08-05 16:00:38 +0200 | [diff] [blame] | 192 | irq_init(); |
Heiko Schocher | dd68a1d | 2013-08-05 16:00:38 +0200 | [diff] [blame] | 193 | |
| 194 | /* arch number of the board */ |
| 195 | gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; |
| 196 | |
| 197 | /* address of boot parameters */ |
| 198 | gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; |
| 199 | |
| 200 | /* setup the SUSPSRC for ARM to control emulation suspend */ |
| 201 | writel(readl(&davinci_syscfg_regs->suspsrc) & |
| 202 | ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | |
| 203 | DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | |
| 204 | DAVINCI_SYSCFG_SUSPSRC_UART0), |
| 205 | &davinci_syscfg_regs->suspsrc); |
| 206 | |
| 207 | /* configure pinmux settings */ |
| 208 | if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) |
| 209 | return 1; |
| 210 | |
| 211 | #ifdef CONFIG_DRIVER_TI_EMAC |
| 212 | davinci_emac_mii_mode_sel(HAS_RMII); |
| 213 | #endif /* CONFIG_DRIVER_TI_EMAC */ |
| 214 | |
| 215 | /* enable the console UART */ |
| 216 | writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | |
| 217 | DAVINCI_UART_PWREMU_MGMT_UTRST), |
| 218 | #if (CONFIG_SYS_NS16550_COM1 == DAVINCI_UART0_BASE) |
| 219 | &davinci_uart0_ctrl_regs->pwremu_mgmt); |
| 220 | #else |
| 221 | &davinci_uart2_ctrl_regs->pwremu_mgmt); |
| 222 | #endif |
| 223 | return 0; |
| 224 | } |
| 225 | |
| 226 | #ifdef CONFIG_DRIVER_TI_EMAC |
| 227 | /* |
| 228 | * Initializes on-board ethernet controllers. |
| 229 | */ |
| 230 | int board_eth_init(bd_t *bis) |
| 231 | { |
| 232 | if (!davinci_emac_initialize()) { |
| 233 | printf("Error: Ethernet init failed!\n"); |
| 234 | return -1; |
| 235 | } |
| 236 | |
| 237 | return 0; |
| 238 | } |
| 239 | #endif /* CONFIG_DRIVER_TI_EMAC */ |
| 240 | |
| 241 | static int init_led(int gpio, char *name, int val) |
| 242 | { |
| 243 | int ret; |
| 244 | |
| 245 | ret = gpio_request(gpio, name); |
| 246 | if (ret) |
| 247 | return -1; |
| 248 | ret = gpio_direction_output(gpio, val); |
| 249 | if (ret) |
| 250 | return -1; |
| 251 | |
| 252 | return gpio; |
| 253 | } |
| 254 | |
| 255 | #define LED_ON 0 |
| 256 | #define LED_OFF 1 |
| 257 | |
| 258 | #if !defined(CONFIG_SPL_BUILD) |
| 259 | #ifdef CONFIG_SHOW_BOOT_PROGRESS |
| 260 | void show_boot_progress(int status) |
| 261 | { |
| 262 | static int red; |
| 263 | static int green; |
| 264 | |
| 265 | if (red == 0) |
Heiko Schocher | 203f391 | 2013-09-06 05:21:24 +0200 | [diff] [blame] | 266 | red = init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_ON); |
Heiko Schocher | dd68a1d | 2013-08-05 16:00:38 +0200 | [diff] [blame] | 267 | if (red != CONFIG_IPAM390_GPIO_LED_RED) |
| 268 | return; |
| 269 | if (green == 0) |
| 270 | green = init_led(CONFIG_IPAM390_GPIO_LED_GREEN, "green", |
| 271 | LED_OFF); |
| 272 | if (green != CONFIG_IPAM390_GPIO_LED_GREEN) |
| 273 | return; |
| 274 | |
| 275 | switch (status) { |
| 276 | case BOOTSTAGE_ID_RUN_OS: |
| 277 | /* |
| 278 | * set normal state |
Heiko Schocher | 203f391 | 2013-09-06 05:21:24 +0200 | [diff] [blame] | 279 | * LED Red : on |
Heiko Schocher | dd68a1d | 2013-08-05 16:00:38 +0200 | [diff] [blame] | 280 | * LED green: off |
| 281 | */ |
Heiko Schocher | 203f391 | 2013-09-06 05:21:24 +0200 | [diff] [blame] | 282 | gpio_set_value(red, LED_ON); |
Heiko Schocher | dd68a1d | 2013-08-05 16:00:38 +0200 | [diff] [blame] | 283 | gpio_set_value(green, LED_OFF); |
| 284 | break; |
| 285 | case BOOTSTAGE_ID_MAIN_LOOP: |
| 286 | /* |
| 287 | * U-Boot operation |
| 288 | * LED Red : on |
| 289 | * LED green: on |
| 290 | */ |
| 291 | gpio_set_value(red, LED_ON); |
| 292 | gpio_set_value(green, LED_ON); |
| 293 | break; |
| 294 | } |
| 295 | } |
| 296 | #endif |
| 297 | #endif |
| 298 | |
| 299 | #ifdef CONFIG_SPL_OS_BOOT |
| 300 | int spl_start_uboot(void) |
| 301 | { |
| 302 | int ret; |
| 303 | int bootmode = 0; |
| 304 | |
| 305 | /* |
| 306 | * GP7[14] selects bootmode: |
| 307 | * 1: boot linux |
| 308 | * 0: boot u-boot |
| 309 | * if error accessing gpio boot U-Boot |
| 310 | * |
| 311 | * SPL bootmode |
| 312 | * 0: boot linux |
| 313 | * 1: boot u-boot |
| 314 | */ |
| 315 | ret = gpio_request(CONFIG_IPAM390_GPIO_BOOTMODE , "bootmode"); |
| 316 | if (ret) |
| 317 | bootmode = 1; |
| 318 | if (!bootmode) { |
| 319 | ret = gpio_direction_input(CONFIG_IPAM390_GPIO_BOOTMODE); |
| 320 | if (ret) |
| 321 | bootmode = 1; |
| 322 | } |
| 323 | if (!bootmode) |
| 324 | ret = gpio_get_value(CONFIG_IPAM390_GPIO_BOOTMODE); |
| 325 | if (!bootmode) |
| 326 | if (ret == 0) |
| 327 | bootmode = 1; |
Heiko Schocher | 203f391 | 2013-09-06 05:21:24 +0200 | [diff] [blame] | 328 | /* |
| 329 | * LED red : on |
| 330 | * LED green: off |
| 331 | */ |
| 332 | init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_ON); |
| 333 | init_led(CONFIG_IPAM390_GPIO_LED_GREEN, "green", LED_OFF); |
Heiko Schocher | dd68a1d | 2013-08-05 16:00:38 +0200 | [diff] [blame] | 334 | return bootmode; |
| 335 | } |
| 336 | #endif |