| Mathieu Othacehe | 2415f1d | 2023-12-29 11:55:23 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2023 Variscite Ltd. |
| 4 | * |
| 5 | */ |
| 6 | |
| 7 | #ifndef _MX9_VAR_EEPROM_H_ |
| 8 | #define _MX9_VAR_EEPROM_H_ |
| 9 | |
| 10 | #ifdef CONFIG_ARCH_IMX9 |
| 11 | #include <asm/arch-imx9/ddr.h> |
| 12 | #endif |
| 13 | |
| 14 | #define VAR_SOM_EEPROM_MAGIC 0x4D58 /* == HEX("MX") */ |
| 15 | |
| 16 | #define VAR_SOM_EEPROM_I2C_ADDR 0x52 |
| 17 | |
| 18 | /* Optional SOM features */ |
| 19 | #define VAR_EEPROM_F_WIFI BIT(0) |
| 20 | #define VAR_EEPROM_F_ETH BIT(1) |
| 21 | #define VAR_EEPROM_F_AUDIO BIT(2) |
| 22 | |
| 23 | /* SOM storage types */ |
| 24 | enum som_storage { |
| 25 | SOM_STORAGE_EMMC, |
| 26 | SOM_STORAGE_NAND, |
| 27 | SOM_STORAGE_UNDEFINED, |
| 28 | }; |
| 29 | |
| 30 | /* Number of DRAM adjustment tables */ |
| 31 | #define DRAM_TABLE_NUM 7 |
| 32 | |
| 33 | struct __packed var_eeprom |
| 34 | { |
| 35 | u16 magic; /* 00-0x00 - magic number */ |
| 36 | u8 partnum[8]; /* 02-0x02 - part number */ |
| 37 | u8 assembly[10]; /* 10-0x0a - assembly number */ |
| 38 | u8 date[9]; /* 20-0x14 - build date */ |
| 39 | u8 mac[6]; /* 29-0x1d - MAC address */ |
| 40 | u8 somrev; /* 35-0x23 - SOM revision */ |
| 41 | u8 version; /* 36-0x24 - EEPROM version */ |
| 42 | u8 features; /* 37-0x25 - SOM features */ |
| 43 | u8 dramsize; /* 38-0x26 - DRAM size */ |
| 44 | u8 reserved[5]; /* 39 0x27 - reserved */ |
| 45 | u32 ddr_crc32; /* 44-0x2c - CRC32 of DDR DATAi */ |
| 46 | u16 ddr_vic; /* 48-0x30 - DDR VIC PN */ |
| 47 | u16 off[DRAM_TABLE_NUM + 1]; /* 50-0x32 - DRAM table offsets */ |
| 48 | }; |
| 49 | |
| 50 | #define VAR_EEPROM_DATA ((struct var_eeprom *)VAR_EEPROM_DRAM_START) |
| 51 | |
| 52 | #define VAR_CARRIER_EEPROM_MAGIC 0x5643 /* == HEX("VC") */ |
| 53 | |
| 54 | #define CARRIER_REV_LEN 16 |
| 55 | struct __packed var_carrier_eeprom |
| 56 | { |
| 57 | u16 magic; /* 00-0x00 - magic number */ |
| 58 | u8 struct_ver; /* 01-0x01 - EEPROM structure version */ |
| 59 | u8 carrier_rev[CARRIER_REV_LEN]; /* 02-0x02 - carrier board revision */ |
| 60 | u32 crc; /* 10-0x0a - checksum */ |
| 61 | }; |
| 62 | |
| 63 | static inline int var_eeprom_is_valid(struct var_eeprom *ep) |
| 64 | { |
| 65 | if (htons(ep->magic) != VAR_SOM_EEPROM_MAGIC) { |
| 66 | debug("Invalid EEPROM magic 0x%x, expected 0x%x\n", |
| 67 | htons(ep->magic), VAR_SOM_EEPROM_MAGIC); |
| 68 | return 0; |
| 69 | } |
| 70 | |
| 71 | return 1; |
| 72 | } |
| 73 | |
| 74 | int var_eeprom_read_header(struct var_eeprom *e); |
| 75 | int var_eeprom_get_dram_size(struct var_eeprom *e, phys_size_t *size); |
| 76 | int var_eeprom_get_mac(struct var_eeprom *e, u8 *mac); |
| 77 | void var_eeprom_print_prod_info(struct var_eeprom *e); |
| 78 | |
| 79 | int var_carrier_eeprom_read(const char *bus_name, int addr, struct var_carrier_eeprom *ep); |
| 80 | int var_carrier_eeprom_is_valid(struct var_carrier_eeprom *ep); |
| 81 | void var_carrier_eeprom_get_revision(struct var_carrier_eeprom *ep, char *rev, size_t size); |
| 82 | |
| 83 | #endif /* _MX9_VAR_EEPROM_H_ */ |