blob: 077b2789bb3c8d99df6c4a8e0b561434a6f5bb0b [file] [log] [blame]
Albert Aribaud89a1ef02010-08-08 05:17:06 +05301/*
2 * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
3 *
4 * Written-by: Albert ARIBAUD <albert.aribaud@free.fr>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 */
24
25#include <common.h>
26#include <asm/io.h>
27
28#if defined(CONFIG_ORION5X)
29#include <asm/arch/orion5x.h>
30#elif defined(CONFIG_KIRKWOOD)
31#include <asm/arch/kirkwood.h>
32#endif
33
34/* SATA port registers */
35struct mvsata_port_registers {
36 u32 reserved1[192];
37 /* offset 0x300 : ATA Interface registers */
38 u32 sstatus;
39 u32 serror;
40 u32 scontrol;
41 u32 ltmode;
42 u32 phymode3;
43 u32 phymode4;
44 u32 reserved2[5];
45 u32 phymode1;
46 u32 phymode2;
47 u32 bist_cr;
48 u32 bist_dw1;
49 u32 bist_dw2;
50 u32 serrorintrmask;
51};
52
53/*
54 * Sanity checks:
55 * - to compile at all, we need CONFIG_SYS_ATA_BASE_ADDR.
56 * - for ide_preinit to make sense, we need at least one of
57 * CONFIG_SYS_ATA_IDE0_OFFSET or CONFIG_SYS_ATA_IDE0_OFFSET;
58 * - for inde_preinit to be called, we need CONFIG_IDE_PREINIT.
59 * Fail with an explanation message if these conditions are not met.
60 * This is particularly important for CONFIG_IDE_PREINIT, because
61 * its lack would not cause a build error.
62 */
63
64#if !defined(CONFIG_SYS_ATA_BASE_ADDR)
65#error CONFIG_SYS_ATA_BASE_ADDR must be defined
66#elif !defined(CONFIG_SYS_ATA_IDE0_OFFSET) \
67 && !defined(CONFIG_SYS_ATA_IDE1_OFFSET)
68#error CONFIG_SYS_ATA_IDE0_OFFSET or CONFIG_SYS_ATA_IDE1_OFFSET \
69 must be defined
70#elif !defined(CONFIG_IDE_PREINIT)
71#error CONFIG_IDE_PREINIT must be defined
72#endif
73
74/*
75 * Masks and values for SControl DETection and Interface Power Management,
76 * and for SStatus DETection.
77 */
78
79#define MVSATA_SCONTROL_DET_MASK 0x0000000F
80#define MVSATA_SCONTROL_DET_NONE 0x00000000
81#define MVSATA_SCONTROL_DET_INIT 0x00000001
82#define MVSATA_SCONTROL_IPM_MASK 0x00000F00
83#define MVSATA_SCONTROL_IPM_NO_LP_ALLOWED 0x00000300
84#define MVSATA_SCONTROL_MASK \
85 (MVSATA_SCONTROL_DET_MASK|MVSATA_SCONTROL_IPM_MASK)
86#define MVSATA_PORT_INIT \
87 (MVSATA_SCONTROL_DET_INIT|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
88#define MVSATA_PORT_USE \
89 (MVSATA_SCONTROL_DET_NONE|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
90#define MVSATA_SSTATUS_DET_MASK 0x0000000F
91#define MVSATA_SSTATUS_DET_DEVCOMM 0x00000003
92
93/*
94 * Initialize one MVSATAHC port: set SControl's IPM to "always active"
95 * and DET to "reset", then wait for SStatus's DET to become "device and
96 * comm ok" (or time out after 50 us if no device), then set SControl's
97 * DET back to "no action".
98 */
99
100static void mvsata_ide_initialize_port(struct mvsata_port_registers *port)
101{
102 u32 control;
103 u32 status;
104 u32 tout = 50; /* wait at most 50 us for SATA reset to complete */
105
106 control = readl(&port->scontrol);
107 control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_INIT;
108 writel(control, &port->scontrol);
109 while (--tout) {
110 status = readl(&port->sstatus) & MVSATA_SSTATUS_DET_MASK;
111 if (status == MVSATA_SSTATUS_DET_DEVCOMM)
112 break;
113 udelay(1);
114 }
115 control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_USE;
116 writel(control, &port->scontrol);
117}
118
119/*
120 * ide_preinit() will be called by ide_init in cmd_ide.c and will
121 * reset the MVSTATHC ports needed by the board.
122 */
123
124int ide_preinit(void)
125{
126 /* Enable ATA port 0 (could be SATA port 0 or 1) if declared */
127#if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
128 mvsata_ide_initialize_port(
129 (struct mvsata_port_registers *)
130 (CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE0_OFFSET));
131#endif
132 /* Enable ATA port 1 (could be SATA port 0 or 1) if declared */
133#if defined(CONFIG_SYS_ATA_IDE1_OFFSET)
134 mvsata_ide_initialize_port(
135 (struct mvsata_port_registers *)
136 (CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE1_OFFSET));
137#endif
138 /* return 0 as we always succeed */
139 return 0;
140}