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wdenkd9fd6ff2002-10-11 08:43:32 +00001/*
2 * (C) Copyright 2002
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2002
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <asm/arch/pxa-regs.h>
29#include <common.h>
Ben Warren0fd6aae2009-10-04 22:37:03 -070030#include <netdev.h>
wdenkd9fd6ff2002-10-11 08:43:32 +000031
Wolfgang Denk6405a152006-03-31 18:32:53 +020032DECLARE_GLOBAL_DATA_PTR;
33
wdenkd9fd6ff2002-10-11 08:43:32 +000034/* ------------------------------------------------------------------------- */
35
36
37/* local prototypes */
38void set_led (int led, int color);
39void error_code_halt (int code);
40int init_sio (int led, unsigned long base);
41inline void cradle_outb (unsigned short val, unsigned long base,
42 unsigned long reg);
43inline unsigned char cradle_inb (unsigned long base, unsigned long reg);
44inline void sleep (int i);
45
46inline void
47/**********************************************************/
48sleep (int i)
49/**********************************************************/
50{
51 while (i--) {
52 udelay (1000000);
53 }
54}
55
56void
57/**********************************************************/
58error_code_halt (int code)
59/**********************************************************/
60{
61 while (1) {
62 led_code (code, RED);
63 sleep (1);
64 led_code (0, OFF);
65 sleep (1);
66 }
67}
68
69void
70/**********************************************************/
71led_code (int code, int color)
72/**********************************************************/
73{
74 int i;
75
76 code &= 0xf; /* only 4 leds */
77
78 for (i = 0; i < 4; i++) {
79 if (code & (1 << i)) {
80 set_led (i, color);
81 } else {
82 set_led (i, OFF);
83 }
84 }
85}
86
87void
88/**********************************************************/
89set_led (int led, int color)
90/**********************************************************/
91{
92 int shift = led * 2;
93 unsigned long mask = 0x3 << shift;
94
95 CRADLE_LED_CLR_REG = mask; /* clear bits */
96 CRADLE_LED_SET_REG = (color << shift); /* set bits */
97 udelay (5000);
98}
99
100inline void
101/**********************************************************/
102cradle_outb (unsigned short val, unsigned long base, unsigned long reg)
103/**********************************************************/
104{
105 *(volatile unsigned short *) (base + (reg * 2)) = val;
106}
107
108inline unsigned char
109/**********************************************************/
110cradle_inb (unsigned long base, unsigned long reg)
111/**********************************************************/
112{
113 unsigned short val;
114
115 val = *(volatile unsigned short *) (base + (reg * 2));
116 return (val & 0xff);
117}
118
119int
120/**********************************************************/
121init_sio (int led, unsigned long base)
122/**********************************************************/
123{
124 unsigned char val;
125
126 set_led (led, YELLOW);
127 val = cradle_inb (base, CRADLE_SIO_INDEX);
128 val = cradle_inb (base, CRADLE_SIO_INDEX);
129 if (val != 0) {
130 set_led (led, RED);
131 return -1;
132 }
133
134 /* map SCC2 to COM1 */
135 cradle_outb (0x01, base, CRADLE_SIO_INDEX);
136 cradle_outb (0x00, base, CRADLE_SIO_DATA);
137
138 /* enable SCC2 extended regs */
139 cradle_outb (0x40, base, CRADLE_SIO_INDEX);
140 cradle_outb (0xa0, base, CRADLE_SIO_DATA);
141
142 /* enable SCC2 clock multiplier */
143 cradle_outb (0x51, base, CRADLE_SIO_INDEX);
144 cradle_outb (0x04, base, CRADLE_SIO_DATA);
145
146 /* enable SCC2 */
147 cradle_outb (0x00, base, CRADLE_SIO_INDEX);
148 cradle_outb (0x04, base, CRADLE_SIO_DATA);
149
150 /* map SCC2 DMA to channel 0 */
151 cradle_outb (0x4f, base, CRADLE_SIO_INDEX);
152 cradle_outb (0x09, base, CRADLE_SIO_DATA);
153
154 /* read ID from SIO to check operation */
155 cradle_outb (0xe4, base, 0x3f8 + 0x3);
156 val = cradle_inb (base, 0x3f8 + 0x0);
157 if ((val & 0xf0) != 0x20) {
158 set_led (led, RED);
159 /* disable SCC2 */
160 cradle_outb (0, base, CRADLE_SIO_INDEX);
161 cradle_outb (0, base, CRADLE_SIO_DATA);
162 return -1;
163 }
164 /* set back to bank 0 */
165 cradle_outb (0, base, 0x3f8 + 0x3);
166 set_led (led, GREEN);
167 return 0;
168}
169
170/*
171 * Miscelaneous platform dependent initialisations
172 */
173
174int
175/**********************************************************/
wdenkda55c6e2004-01-20 23:12:12 +0000176board_late_init (void)
wdenkd9fd6ff2002-10-11 08:43:32 +0000177/**********************************************************/
178{
179 return (0);
180}
181
182int
183/**********************************************************/
184board_init (void)
185/**********************************************************/
186{
wdenkd9fd6ff2002-10-11 08:43:32 +0000187 led_code (0xf, YELLOW);
188
189 /* arch number of HHP Cradle */
wdenk767fbd42004-10-10 18:41:04 +0000190 gd->bd->bi_arch_number = MACH_TYPE_HHP_CRADLE;
wdenkd9fd6ff2002-10-11 08:43:32 +0000191
192 /* adress of boot parameters */
193 gd->bd->bi_boot_params = 0xa0000100;
194
195 /* Init SIOs to enable SCC2 */
196 udelay (100000); /* delay makes it look neat */
197 init_sio (0, CRADLE_SIO1_PHYS);
198 udelay (100000);
199 init_sio (1, CRADLE_SIO2_PHYS);
200 udelay (100000);
201 init_sio (2, CRADLE_SIO3_PHYS);
202 udelay (100000);
203 set_led (3, GREEN);
204
205 return 1;
206}
207
208int
209/**********************************************************/
210dram_init (void)
211/**********************************************************/
212{
wdenkd9fd6ff2002-10-11 08:43:32 +0000213 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
214 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
215 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
216 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
217 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
218 gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
219 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
220 gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
221
222 return (PHYS_SDRAM_1_SIZE +
223 PHYS_SDRAM_2_SIZE +
224 PHYS_SDRAM_3_SIZE +
225 PHYS_SDRAM_4_SIZE );
226}
Ben Warren0fd6aae2009-10-04 22:37:03 -0700227
228#ifdef CONFIG_CMD_NET
229int board_eth_init(bd_t *bis)
230{
231 int rc = 0;
232#ifdef CONFIG_SMC91111
233 rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
234#endif
235 return rc;
236}
237#endif