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Tom Rini65461122022-06-17 16:24:31 -04001config NXP_ESBC
2 bool "NXP ESBC (secure boot) functionality"
3 help
4 Enable Freescale Secure Boot feature. Normally selected by defconfig.
5 If unsure, do not change.
6
7menu "Chain of trust / secure boot options"
Udit Agarwal22ec2382019-11-07 16:11:32 +00008 depends on !FIT_SIGNATURE && NXP_ESBC
Tom Rini65461122022-06-17 16:24:31 -04009
10config CHAIN_OF_TRUST
Tom Rinia5c4d402017-03-01 16:51:58 -050011 select FSL_CAAM
Gaurav Jainbd50fd12022-06-09 16:32:15 +053012 select ARCH_MISC_INIT
Tom Rini0b58c2e2022-06-16 14:04:39 -040013 select FSL_SEC_MON
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080014 select SPL_BOARD_INIT if (ARM && SPL)
Alexandru Gagniuc97464ff2021-09-02 19:54:19 -050015 select SPL_HASH if (ARM && SPL)
Tom Rini5bdd9192017-05-15 12:17:49 -040016 select SHA_HW_ACCEL
17 select SHA_PROG_HW_ACCEL
Simon Glass73c18b42017-07-23 21:19:39 -060018 select ENV_IS_NOWHERE
Sumit Garg13ad2902018-01-09 01:27:46 +053019 select CMD_EXT4 if ARM
20 select CMD_EXT4_WRITE if ARM
Tom Rini65461122022-06-17 16:24:31 -040021 imply CMD_BLOB
22 imply CMD_HASH if ARM
23 def_bool y
Simon Glassa6a9ea42017-05-17 03:25:16 -060024
25config CMD_ESBC_VALIDATE
26 bool "Enable the 'esbc_validate' and 'esbc_halt' commands"
Tom Riniaac187d2022-06-16 14:04:35 -040027 default y
Simon Glassa6a9ea42017-05-17 03:25:16 -060028 help
29 This option enables two commands used for secure booting:
30
31 esbc_validate - validate signature using RSA verification
32 esbc_halt - put the core in spin loop (Secure Boot Only)
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +053033
Tom Rinieb56a392022-06-16 14:04:37 -040034config ESBC_HDR_LS
35 bool
36
37config ESBC_ADDR_64BIT
38 def_bool y
39 depends on ESBC_HDR_LS && FSL_LAYERSCAPE
40 help
41 For Layerscape based platforms, ESBC image Address in Header is 64bit.
42
Tom Rinia1663992022-06-16 14:04:40 -040043config SYS_FSL_SFP_BE
44 def_bool y
Tom Rini65461122022-06-17 16:24:31 -040045 depends on PPC || FSL_LSCH2 || ARCH_LS1021A
Tom Rinia1663992022-06-16 14:04:40 -040046
47config SYS_FSL_SFP_LE
48 def_bool y
Tom Rini65461122022-06-17 16:24:31 -040049 depends on !SYS_FSL_SFP_BE
Tom Rinia1663992022-06-16 14:04:40 -040050
51choice
52 prompt "SFP IP revision"
Tom Rinia1663992022-06-16 14:04:40 -040053 default SYS_FSL_SFP_VER_3_0 if PPC
54 default SYS_FSL_SFP_VER_3_4
55
56config SYS_FSL_SFP_VER_3_0
57 bool "SFP version 3.0"
58
59config SYS_FSL_SFP_VER_3_2
60 bool "SFP version 3.2"
61
62config SYS_FSL_SFP_VER_3_4
63 bool "SFP version 3.4"
64
65endchoice
66
Tom Rini27fcd312022-06-17 16:24:32 -040067config SPL_UBOOT_KEY_HASH
68 string "Non-SRK key hash for U-Boot public/private key pair"
69 depends on SPL
70 default ""
71 help
72 Set the key hash for U-Boot here if public/private key pair used to
73 sign U-boot are different from the SRK hash put in the fuse. Example
74 of a key hash is
75 41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b.
76 Otherwise leave this empty.
77
Tom Rinibf1dfd82022-06-17 16:24:34 -040078if PPC
79
80config BOOTSCRIPT_COPY_RAM
81 bool "Secure boot copies boot script to RAM"
82 help
83 On systems that support chain of trust booting, a number of addresses
84 are required to set variables that are used in the copying and then
85 verification of different parts of the system. If enabled, the subsequent
86 options are for what location to use in each step.
87
88config BS_ADDR_DEVICE
89 hex "Address in RAM for bs_device"
90 depends on BOOTSCRIPT_COPY_RAM
91
92config BS_SIZE
93 hex "The size of bs_size which is the amount read from bs_device"
94 depends on BOOTSCRIPT_COPY_RAM
95
96config BS_ADDR_RAM
97 hex "Address in RAM for bs_ram"
98 depends on BOOTSCRIPT_COPY_RAM
99
100config BS_HDR_ADDR_DEVICE
101 hex "Address in RAM for bs_hdr_device"
102 depends on BOOTSCRIPT_COPY_RAM
103
104config BS_HDR_SIZE
105 hex "The size of bs_hdr_size which is the amount read from bs_hdr_device"
106 depends on BOOTSCRIPT_COPY_RAM
107
108config BS_HDR_ADDR_RAM
109 hex "Address in RAM for bs_hdr_ram"
110 depends on BOOTSCRIPT_COPY_RAM
111
112config BOOTSCRIPT_HDR_ADDR
113 hex "CONFIG_BOOTSCRIPT_HDR_ADDR"
114 default BS_ADDR_RAM if BOOTSCRIPT_COPY_RAM
115
116endif
117
Tom Rinia1663992022-06-16 14:04:40 -0400118config SYS_FSL_SRK_LE
119 def_bool y
Tom Rini65461122022-06-17 16:24:31 -0400120 depends on ARM
Tom Rinia1663992022-06-16 14:04:40 -0400121
122config KEY_REVOCATION
123 def_bool y
Tom Rini65461122022-06-17 16:24:31 -0400124
125endmenu
126
127comment "Other functionality shared between NXP SoCs"
Tom Rinia1663992022-06-16 14:04:40 -0400128
Tom Rinib643ebd2022-03-24 17:17:58 -0400129config DEEP_SLEEP
130 bool "Enable SoC deep sleep feature"
Tom Riniaac187d2022-06-16 14:04:35 -0400131 depends on ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A
132 default y
Tom Rinib643ebd2022-03-24 17:17:58 -0400133 help
134 Indicates this SoC supports deep sleep feature. If deep sleep is
135 supported, core will start to execute uboot when wakes up.
136
Tom Rini9d291f42022-06-20 08:07:44 -0400137config LAYERSCAPE_NS_ACCESS
138 bool "Layerscape non-secure access support"
139 depends on ARCH_LS1021A || FSL_LSCH2
140
Tom Rini7485ebf62022-06-20 08:07:45 -0400141config PCIE1
142 bool "PCIe controller #1"
143 depends on LAYERSCAPE_NS_ACCESS || PPC
144
145config PCIE2
146 bool "PCIe controller #2"
147 depends on LAYERSCAPE_NS_ACCESS || PPC
148
149config PCIE3
150 bool "PCIe controller #3"
151 depends on LAYERSCAPE_NS_ACCESS || PPC
152
153config PCIE4
154 bool "PCIe controller #4"
155 depends on LAYERSCAPE_NS_ACCESS || PPC
156
Stephen Carlsone36d49c2021-06-22 16:35:20 -0700157config FSL_USE_PCA9547_MUX
158 bool "Enable PCA9547 I2C Mux on Freescale boards"
Tom Riniaac187d2022-06-16 14:04:35 -0400159 depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
Stephen Carlsone36d49c2021-06-22 16:35:20 -0700160 help
161 This option enables the PCA9547 I2C mux on Freescale boards.
162
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100163config VID
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100164 bool "Enable Freescale VID"
Tom Riniaac187d2022-06-16 14:04:35 -0400165 depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (I2C || DM_I2C)
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100166 help
167 This option enables setting core voltage based on individual
168 values saved in SoC fuses.
169
Tom Rini89cdcab2021-12-12 22:12:31 -0500170config SPL_VID
171 bool "Enable Freescale VID in SPL"
Tom Riniaac187d2022-06-16 14:04:35 -0400172 depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (SPL_I2C || DM_SPL_I2C)
Tom Rini89cdcab2021-12-12 22:12:31 -0500173 help
174 This option enables setting core voltage based on individual
175 values saved in SoC fuses, in SPL.
176
177if VID || SPL_VID
178
179config VID_FLS_ENV
180 string "Environment variable for overriding VDD"
181 help
182 This option allows for specifying the environment variable
183 to check to override VDD information.
184
185config VOL_MONITOR_INA220
186 bool "Enable the INA220 voltage monitor read"
187 help
188 This option enables INA220 voltage monitor read
189 functionality. It is used by the common VID driver.
190
191config VOL_MONITOR_IR36021_READ
192 bool "Enable the IR36021 voltage monitor read"
193 help
194 This option enables IR36021 voltage monitor read
195 functionality. It is used by the common VID driver.
196
197config VOL_MONITOR_IR36021_SET
198 bool "Enable the IR36021 voltage monitor set"
199 help
200 This option enables IR36021 voltage monitor set
201 functionality. It is used by the common VID driver.
202
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +0530203config VOL_MONITOR_LTC3882_READ
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +0530204 bool "Enable the LTC3882 voltage monitor read"
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +0530205 help
206 This option enables LTC3882 voltage monitor read
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100207 functionality. It is used by the common VID driver.
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +0530208
209config VOL_MONITOR_LTC3882_SET
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +0530210 bool "Enable the LTC3882 voltage monitor set"
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +0530211 help
212 This option enables LTC3882 voltage monitor set
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100213 functionality. It is used by the common VID driver.
214
215config VOL_MONITOR_ISL68233_READ
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100216 bool "Enable the ISL68233 voltage monitor read"
217 help
218 This option enables ISL68233 voltage monitor read
219 functionality. It is used by the common VID driver.
220
221config VOL_MONITOR_ISL68233_SET
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100222 bool "Enable the ISL68233 voltage monitor set"
223 help
224 This option enables ISL68233 voltage monitor set
225 functionality. It is used by the common VID driver.
Tom Rini89cdcab2021-12-12 22:12:31 -0500226
227endif
Tom Rinie24547a2022-03-30 18:07:32 -0400228
229config FSL_QIXIS
230 bool "Enable QIXIS support"
Tom Riniaac187d2022-06-16 14:04:35 -0400231 depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
Tom Rinie24547a2022-03-30 18:07:32 -0400232
233config QIXIS_I2C_ACCESS
234 bool "Access to QIXIS is over i2c"
235 depends on FSL_QIXIS
236 default y
Tom Rini41713012022-06-08 08:24:28 -0400237
238config HAS_FSL_DR_USB
239 def_bool y
240 depends on USB_EHCI_HCD && PPC