Masahiro Yamada | ee53ea7 | 2020-02-14 20:54:40 +0900 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 or later |
| 2 | /* |
| 3 | * Copyright (C) 2020 Socionext Inc. |
| 4 | * Author: Masahiro Yamada <yamada.masahiro@socionext.com> |
| 5 | */ |
| 6 | |
Masahiro Yamada | ee53ea7 | 2020-02-14 20:54:40 +0900 | [diff] [blame] | 7 | #include <linux/errno.h> |
| 8 | #include <dm.h> |
| 9 | #include <dm/uclass-internal.h> |
| 10 | #include <reset.h> |
| 11 | |
| 12 | #include "init.h" |
| 13 | |
| 14 | /* |
| 15 | * Assert the Denali NAND controller reset if found. |
| 16 | * |
| 17 | * On LD4, the bootstrap process starts running after power-on reset regardless |
| 18 | * of the boot mode, here the pin-mux is not necessarily set up for NAND, then |
| 19 | * the controller is stuck. Assert the controller reset here, and should be |
| 20 | * deasserted in the driver after the pin-mux is correctly handled. For other |
| 21 | * SoCs, the bootstrap runs only when the boot mode selects ONFi, but it is yet |
| 22 | * effective when the boot swap is on. So, the reset should be asserted anyway. |
| 23 | */ |
| 24 | void uniphier_nand_reset_assert(void) |
| 25 | { |
| 26 | struct udevice *dev; |
| 27 | struct reset_ctl_bulk resets; |
| 28 | int ret; |
| 29 | |
| 30 | ret = uclass_find_first_device(UCLASS_MTD, &dev); |
| 31 | if (ret || !dev) |
| 32 | return; |
| 33 | |
| 34 | /* make sure this is the Denali NAND controller */ |
| 35 | if (strcmp(dev->driver->name, "denali-nand-dt")) |
| 36 | return; |
| 37 | |
| 38 | ret = reset_get_bulk(dev, &resets); |
| 39 | if (ret) |
| 40 | return; |
| 41 | |
| 42 | reset_assert_bulk(&resets); |
| 43 | } |