Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 1 | .. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause |
Patrice Chotard | 90e8278 | 2021-01-04 17:00:56 +0100 | [diff] [blame] | 2 | .. sectionauthor:: Patrick Delaunay <patrick.delaunay@foss.st.com> |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 3 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 4 | STM32MP1xx boards |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 5 | ================= |
| 6 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 7 | This is a quick instruction for setup STMicroelectronics STM32MP1xx boards. |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 8 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 9 | Further information can be found in STMicroelectronics STM32 WIKI_. |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 10 | |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 11 | Supported devices |
| 12 | ----------------- |
| 13 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 14 | U-Boot supports all the STMicroelectronics MPU with the associated boards |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 15 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 16 | - STMP32MP15x SoCs: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 17 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 18 | - STM32MP157 |
| 19 | - STM32MP153 |
| 20 | - STM32MP151 |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 21 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 22 | - STMP32MP13x SoCs: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 23 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 24 | - STM32MP135 |
| 25 | - STM32MP133 |
| 26 | - STM32MP131 |
Patrick Delaunay | db33b0e | 2020-02-26 11:26:43 +0100 | [diff] [blame] | 27 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 28 | Everything is supported in Linux but U-Boot is limited to the boot device: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 29 | |
| 30 | 1. UART |
| 31 | 2. SD card/MMC controller (SDMMC) |
| 32 | 3. NAND controller (FMC) |
| 33 | 4. NOR controller (QSPI) |
| 34 | 5. USB controller (OTG DWC2) |
| 35 | 6. Ethernet controller |
| 36 | |
| 37 | And the necessary drivers |
| 38 | |
| 39 | 1. I2C |
| 40 | 2. STPMIC1 (PMIC and regulator) |
| 41 | 3. Clock, Reset, Sysreset |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 42 | 4. Fuse (BSEC) |
| 43 | 5. OP-TEE |
| 44 | 6. ETH |
| 45 | 7. USB host |
| 46 | 8. WATCHDOG |
| 47 | 9. RNG |
| 48 | 10. RTC |
| 49 | |
| 50 | STM32MP15x |
| 51 | `````````` |
| 52 | |
| 53 | The STM32MP15x is a Cortex-A7 MPU aimed at various applications. |
| 54 | |
| 55 | It features: |
| 56 | |
| 57 | - Dual core Cortex-A7 application core (Single on STM32MP151) |
| 58 | - 2D/3D image composition with GPU (only on STM32MP157) |
| 59 | - Standard memories interface support |
| 60 | - Standard connectivity, widely inherited from the STM32 MCU family |
| 61 | - Comprehensive security support |
| 62 | - Cortex M4 coprocessor |
| 63 | |
| 64 | Each line comes with a security option (cryptography & secure boot) and |
| 65 | a Cortex-A frequency option: |
| 66 | |
| 67 | - A : Cortex-A7 @ 650 MHz |
| 68 | - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz |
| 69 | - D : Cortex-A7 @ 800 MHz |
| 70 | - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 71 | |
| 72 | Currently the following boards are supported: |
| 73 | |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 74 | + stm32mp157a-dk1.dts |
| 75 | + stm32mp157c-dk2.dts |
| 76 | + stm32mp157c-ed1.dts |
| 77 | + stm32mp157c-ev1.dts |
Marek Vasut | 526c951 | 2020-03-31 19:51:36 +0200 | [diff] [blame] | 78 | + stm32mp15xx-dhcor-avenger96.dts |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 79 | |
Patrick Delaunay | ddba40a | 2022-07-05 16:55:57 +0200 | [diff] [blame] | 80 | The SCMI variant of each board is supported by a specific "scmi" device tree: |
| 81 | + stm32mp157a-dk1-scmi.dts |
| 82 | + stm32mp157c-dk2-scmi.dts |
| 83 | + stm32mp157c-ed1-scmi.dts |
| 84 | + stm32mp157c-ev1-scmi.dts |
| 85 | |
| 86 | SCMI variant is used only with stm32mp15_defconfig, when the resources are |
| 87 | secured with RCC_TZCR.TZEN=1 in OP-TEE. The access to these reset and clock |
| 88 | resources are provided by OP-TEE and the associated SCMI services. |
| 89 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 90 | STM32MP13x |
| 91 | `````````` |
| 92 | |
| 93 | The STM32MP13x is a single Cortex-A7 MPU aimed at various applications. |
| 94 | |
| 95 | Currently the following boards are supported: |
| 96 | |
| 97 | + stm32mp135f-dk.dts |
| 98 | |
| 99 | |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 100 | Boot Sequences |
| 101 | -------------- |
| 102 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 103 | 2 boot configurations are supported with: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 104 | |
| 105 | +----------+------------------------+-------------------------+--------------+ |
| 106 | | **ROM** | **FSBL** | **SSBL** | **OS** | |
| 107 | + **code** +------------------------+-------------------------+--------------+ |
| 108 | | | First Stage Bootloader | Second Stage Bootloader | Linux Kernel | |
| 109 | + +------------------------+-------------------------+--------------+ |
| 110 | | | embedded RAM | DDR | |
| 111 | +----------+------------------------+-------------------------+--------------+ |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 112 | | TrustZone| secure monitor | |
| 113 | +----------+------------------------+-------------------------+--------------+ |
| 114 | |
| 115 | The trusted boot chain is recommended with: |
| 116 | |
| 117 | - FSBL = **TF-A BL2** |
| 118 | - Secure monitor = **OP-TEE** |
| 119 | - SSBL = **U-Boot** |
| 120 | |
| 121 | It is the only supported boot chain for STM32MP13x family. |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 122 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 123 | The **Trusted** boot chain with TF-A_ |
| 124 | ````````````````````````````````````` |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 125 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 126 | defconfig_file : |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 127 | + **stm32mp15_defconfig** and **stm32mp13_defconfig** (for TF-A_ with FIP support) |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 128 | + **stm32mp15_trusted_defconfig** (for TF-A_ without FIP support) |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 129 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 130 | +-------------+--------------------------+------------+-------+ |
| 131 | | ROM code | FSBL | SSBL | OS | |
| 132 | + +--------------------------+------------+-------+ |
| 133 | | |Trusted Firmware-A (TF-A_)| U-Boot | Linux | |
| 134 | +-------------+--------------------------+------------+-------+ |
| 135 | | TrustZone |secure monitor = SPMin or OP-TEE_ | |
| 136 | +-------------+--------------------------+------------+-------+ |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 137 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 138 | TF-A_ and OP-TEE_ are 2 separate projects, with their git repository; |
| 139 | they are compiled separately. |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 140 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 141 | TF-A_ (BL2) initialize the DDR and loads the next stage binaries from a FIP file: |
| 142 | + BL32: a secure monitor BL32 = SPMin provided by TF-A_ or OP-TEE_ : |
| 143 | performs a full initialization of Secure peripherals and provides service |
| 144 | to normal world |
| 145 | + BL33: a non-trusted firmware = U-Boot, running in normal world and uses |
| 146 | the secure monitor to access to secure resources. |
| 147 | + HW_CONFIG: The hardware configuration file = the U-Boot device tree |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 148 | |
Patrick Delaunay | ddba40a | 2022-07-05 16:55:57 +0200 | [diff] [blame] | 149 | The scmi variant of each device tree is only support with OP-TEE as secure |
| 150 | monitor, with stm32mp15_defconfig. |
| 151 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 152 | The **Basic** boot chain with SPL (for STM32MP15x) |
| 153 | `````````````````````````````````````````````````` |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 154 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 155 | defconfig_file : |
| 156 | + **stm32mp15_basic_defconfig** |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 157 | |
| 158 | +-------------+------------+------------+-------+ |
| 159 | | ROM code | FSBL | SSBL | OS | |
| 160 | + +------------+------------+-------+ |
| 161 | | |U-Boot SPL | U-Boot | Linux | |
| 162 | +-------------+------------+------------+-------+ |
| 163 | | TrustZone | | PSCI from U-Boot | |
| 164 | +-------------+------------+------------+-------+ |
| 165 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 166 | SPL has limited security initialization. |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 167 | |
| 168 | U-Boot is running in secure mode and provide a secure monitor to the kernel |
| 169 | with only PSCI support (Power State Coordination Interface defined by ARM). |
| 170 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 171 | .. warning:: This alternate **basic** boot chain with SPL is not supported/promoted by STMicroelectronics to make product. |
| 172 | |
| 173 | Device Tree |
| 174 | ----------- |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 175 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 176 | All the STM32MP15x and STM32MP13x boards supported by U-Boot use the same generic board |
| 177 | stm32mp1 which supports all the bootable devices. |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 178 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 179 | Each STMicroelectronics board is only configured with the associated device tree. |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 180 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 181 | STM32MP15x device Tree Selection |
| 182 | ```````````````````````````````` |
| 183 | The supported device trees for STM32MP15x (stm32mp15_trusted_defconfig and stm32mp15_basic_defconfig) are: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 184 | |
| 185 | + ev1: eval board with pmic stpmic1 (ev1 = mother board + daughter ed1) |
| 186 | |
| 187 | + stm32mp157c-ev1 |
| 188 | |
| 189 | + ed1: daughter board with pmic stpmic1 |
| 190 | |
| 191 | + stm32mp157c-ed1 |
| 192 | |
| 193 | + dk1: Discovery board |
| 194 | |
| 195 | + stm32mp157a-dk1 |
| 196 | |
| 197 | + dk2: Discovery board = dk1 with a BT/WiFI combo and a DSI panel |
| 198 | |
| 199 | + stm32mp157c-dk2 |
| 200 | |
Marek Vasut | 526c951 | 2020-03-31 19:51:36 +0200 | [diff] [blame] | 201 | + avenger96: Avenger96 board from Arrow Electronics based on DH Elec. DHCOR SoM |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 202 | |
Marek Vasut | 526c951 | 2020-03-31 19:51:36 +0200 | [diff] [blame] | 203 | + stm32mp15xx-dhcor-avenger96 |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 204 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 205 | STM32MP13x device Tree Selection |
| 206 | ```````````````````````````````` |
| 207 | The supported device trees for STM32MP13x (stm32mp13_defconfig) are: |
| 208 | |
| 209 | + dk: Discovery board |
| 210 | |
| 211 | + stm32mp135f-dk |
| 212 | |
| 213 | |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 214 | Build Procedure |
| 215 | --------------- |
| 216 | |
| 217 | 1. Install the required tools for U-Boot |
| 218 | |
| 219 | * install package needed in U-Boot makefile |
| 220 | (libssl-dev, swig, libpython-dev...) |
| 221 | |
| 222 | * install ARMv7 toolchain for 32bit Cortex-A (from Linaro, |
| 223 | from SDK for STM32MP15x, or any crosstoolchains from your distribution) |
| 224 | (you can use any gcc cross compiler compatible with U-Boot) |
| 225 | |
| 226 | 2. Set the cross compiler:: |
| 227 | |
| 228 | # export CROSS_COMPILE=/path/to/toolchain/arm-linux-gnueabi- |
| 229 | |
| 230 | 3. Select the output directory (optional):: |
| 231 | |
| 232 | # export KBUILD_OUTPUT=/path/to/output |
| 233 | |
| 234 | for example: use one output directory for each configuration:: |
| 235 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 236 | # export KBUILD_OUTPUT=stm32mp13 |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 237 | # export KBUILD_OUTPUT=stm32mp15 |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 238 | # export KBUILD_OUTPUT=stm32mp15_trusted |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 239 | # export KBUILD_OUTPUT=stm32mp15_basic |
| 240 | |
| 241 | you can build outside of code directory:: |
| 242 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 243 | # export KBUILD_OUTPUT=../build/stm32mp15 |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 244 | |
| 245 | 4. Configure U-Boot:: |
| 246 | |
| 247 | # make <defconfig_file> |
| 248 | |
| 249 | with <defconfig_file>: |
| 250 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 251 | - For **trusted** boot mode : |
| 252 | - For STM32MP13x: **stm32mp13_defconfig** |
| 253 | - For STM32MP15x: **stm32mp15_defconfig** or stm32mp15_trusted_defconfig |
| 254 | - For STM32MP15x basic boot mode: stm32mp15_basic_defconfig |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 255 | |
| 256 | 5. Configure the device-tree and build the U-Boot image:: |
| 257 | |
| 258 | # make DEVICE_TREE=<name> all |
| 259 | |
| 260 | Examples: |
| 261 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 262 | a) trusted boot with FIP on STM32MP15x ev1:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 263 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 264 | # export KBUILD_OUTPUT=stm32mp15 |
| 265 | # make stm32mp15_defconfig |
Patrick Delaunay | ddba40a | 2022-07-05 16:55:57 +0200 | [diff] [blame] | 266 | # make DEVICE_TREE=stm32mp157c-ev1-scmi all |
| 267 | |
| 268 | or without SCMI support |
| 269 | |
| 270 | # export KBUILD_OUTPUT=stm32mp15 |
| 271 | # make stm32mp15_defconfig |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 272 | # make DEVICE_TREE=stm32mp157c-ev1 all |
| 273 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 274 | b) trusted boot on STM32MP13x discovery board:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 275 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 276 | # export KBUILD_OUTPUT=stm32mp13 |
| 277 | # make stm32mp13_defconfig |
| 278 | # make DEVICE_TREE=stm32mp135f-dk all |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 279 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 280 | DEVICE_TEE selection is optional as stm32mp135f-dk is the default board of the defconfig:: |
| 281 | |
| 282 | # make stm32mp13_defconfig |
| 283 | # make all |
| 284 | |
| 285 | c) basic boot on STM32MP15x ev1:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 286 | |
| 287 | # export KBUILD_OUTPUT=stm32mp15_basic |
| 288 | # make stm32mp15_basic_defconfig |
| 289 | # make DEVICE_TREE=stm32mp157c-ev1 all |
| 290 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 291 | d) basic boot on STM32MP15x ed1:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 292 | |
| 293 | # export KBUILD_OUTPUT=stm32mp15_basic |
| 294 | # make stm32mp15_basic_defconfig |
| 295 | # make DEVICE_TREE=stm32mp157c-ed1 all |
| 296 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 297 | e) basic boot on STM32MP15x dk1:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 298 | |
| 299 | # export KBUILD_OUTPUT=stm32mp15_basic |
| 300 | # make stm32mp15_basic_defconfig |
| 301 | # make DEVICE_TREE=stm32mp157a-dk1 all |
| 302 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 303 | f) basic boot on STM32MP15x avenger96:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 304 | |
| 305 | # export KBUILD_OUTPUT=stm32mp15_basic |
| 306 | # make stm32mp15_basic_defconfig |
Marek Vasut | 526c951 | 2020-03-31 19:51:36 +0200 | [diff] [blame] | 307 | # make DEVICE_TREE=stm32mp15xx-dhcor-avenger96 all |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 308 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 309 | 6. U-Boot Output files |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 310 | |
| 311 | So in the output directory (selected by KBUILD_OUTPUT), |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 312 | you can found the needed U-Boot files: |
| 313 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 314 | - stm32mp13_defconfig = **u-boot-nodtb.bin** and **u-boot.dtb** |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 315 | - stm32mp15_defconfig = **u-boot-nodtb.bin** and **u-boot.dtb** |
| 316 | |
| 317 | - stm32mp15_trusted_defconfig = u-boot.stm32 |
| 318 | |
| 319 | - stm32mp15_basic_defconfig |
| 320 | |
| 321 | - FSBL = spl/u-boot-spl.stm32 |
| 322 | |
| 323 | - SSBL = u-boot.img (without CONFIG_SPL_LOAD_FIT) or |
| 324 | u-boot.itb (with CONFIG_SPL_LOAD_FIT=y) |
| 325 | |
| 326 | 7. TF-A_ compilation |
| 327 | |
| 328 | This step is required only for **Trusted** boot (stm32mp15_defconfig and |
| 329 | stm32mp15_trusted_defconfig); see OP-TEE_ and TF-A_ documentation for build |
| 330 | commands. |
| 331 | |
| 332 | - For TF-A_ with FIP support: **stm32mp15_defconfig** |
| 333 | |
| 334 | - with OP-TEE_ support, compile the OP-TEE to generate the binary included |
| 335 | in FIP |
| 336 | |
| 337 | - after TF-A compilation, the used files are: |
| 338 | |
| 339 | - TF-A_ BL2 => FSBL = **tf-a.stm32** |
| 340 | |
| 341 | - FIP => **fip.bin** |
| 342 | |
| 343 | FIP file includes the 2 files given in arguments of TF-A_ compilation: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 344 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 345 | - BL33=u-boot-nodtb.bin |
| 346 | - BL33_CFG=u-boot.dtb |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 347 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 348 | You can also update a existing FIP after U-boot compilation with fiptool, |
| 349 | a tool provided by TF-A_:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 350 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 351 | # fiptool update --nt-fw u-boot-nodtb.bin --hw-config u-boot.dtb fip-stm32mp157c-ev1.bin |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 352 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 353 | - For TF-A_ without FIP support : **stm32mp15_trusted_defconfig** |
| 354 | SPMin is used and the used files are: |
| 355 | |
| 356 | - FSBL = **tf-a.stm32** (provided by TF-A_ compilation, contening BL2 and |
| 357 | BL32 = SPMin) |
| 358 | |
| 359 | - SSBL = **u-boot.stm32** used instead of fip.bin in next chapters |
| 360 | |
| 361 | 8. The bootloaders files |
| 362 | |
| 363 | + The **ROM code** expects FSBL binaries with STM32 image header = |
| 364 | tf-a.stm32 or u-boot-spl.stm32 |
| 365 | |
| 366 | According the FSBL / the boot mode: |
| 367 | |
| 368 | + **TF-A** expect a FIP binary = fip.bin, including the OS monitor (SPMin or |
| 369 | OP-TEE_) and the U-Boot binary + device tree |
| 370 | |
| 371 | or, without FIP support, binaries with STM32 image header: U-Boot |
| 372 | = u-boot.stm32 and eventually OP-TEE files (tee-header.stm32, tee-pageable.stm32, |
| 373 | tee-pager.stm32) |
| 374 | |
| 375 | + **SPL** expects SSBL = U-Boot with uImage header = u-boot.img |
| 376 | or FIT = u-boot.itb. |
| 377 | |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 378 | |
| 379 | Switch Setting for Boot Mode |
| 380 | ---------------------------- |
| 381 | |
| 382 | You can select the boot mode, on the board with one switch, to select |
| 383 | the boot pin values = BOOT0, BOOT1, BOOT2 |
| 384 | |
| 385 | +-------------+---------+---------+---------+ |
| 386 | |*Boot Mode* | *BOOT2* | *BOOT1* | *BOOT0* | |
| 387 | +=============+=========+=========+=========+ |
| 388 | | Recovery | 0 | 0 | 0 | |
| 389 | +-------------+---------+---------+---------+ |
| 390 | | NOR | 0 | 0 | 1 | |
| 391 | +-------------+---------+---------+---------+ |
| 392 | | eMMC | 0 | 1 | 0 | |
| 393 | +-------------+---------+---------+---------+ |
| 394 | | NAND | 0 | 1 | 1 | |
| 395 | +-------------+---------+---------+---------+ |
| 396 | | Reserved | 1 | 0 | 0 | |
| 397 | +-------------+---------+---------+---------+ |
| 398 | | SD-Card | 1 | 0 | 1 | |
| 399 | +-------------+---------+---------+---------+ |
| 400 | | Recovery | 1 | 1 | 0 | |
| 401 | +-------------+---------+---------+---------+ |
| 402 | | SPI-NAND | 1 | 1 | 1 | |
| 403 | +-------------+---------+---------+---------+ |
| 404 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 405 | - on the STM32MP15x **daughter board ed1 = MB1263** with the switch SW1 |
| 406 | - on STM32MP15x **Avenger96** with switch S3 (NOR and SPI-NAND are not applicable) |
| 407 | - on board STM32MP15x **DK1/DK2** with the switch SW1 = BOOT0, BOOT2 |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 408 | with only 2 pins available (BOOT1 is forced to 0 and NOR not supported), |
| 409 | the possible value becomes: |
| 410 | |
| 411 | +-------------+---------+---------+ |
| 412 | |*Boot Mode* | *BOOT2* | *BOOT0* | |
| 413 | +=============+=========+=========+ |
| 414 | | Recovery | 0 | 0 | |
| 415 | +-------------+---------+---------+ |
| 416 | | NOR (NA)| 0 | 1 | |
| 417 | +-------------+---------+---------+ |
| 418 | | Reserved | 1 | 0 | |
| 419 | +-------------+---------+---------+ |
| 420 | | SD-Card | 1 | 1 | |
| 421 | +-------------+---------+---------+ |
| 422 | |
| 423 | Recovery is a boot from serial link (UART/USB) and it is used with |
| 424 | STM32CubeProgrammer tool to load executable in RAM and to update the flash |
| 425 | devices available on the board (NOR/NAND/eMMC/SD card). |
| 426 | |
| 427 | The communication between HOST and board is based on |
| 428 | |
| 429 | - for UARTs : the uart protocol used with all MCU STM32 |
| 430 | - for USB : based on USB DFU 1.1 (without the ST extensions used on MCU STM32) |
| 431 | |
| 432 | Prepare an SD card |
| 433 | ------------------ |
| 434 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 435 | The minimal requirements for STMP32MP15x and STM32MP13x boot up to U-Boot are: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 436 | |
| 437 | - GPT partitioning (with gdisk or with sgdisk) |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 438 | - 2 fsbl partitions, named "fsbl1" and "fsbl2", size at least 256KiB |
| 439 | - one partition named "fip" for FIP or U-Boot (TF-A_ search the "fip" |
| 440 | partition and SPL search the 3th partition, because |
| 441 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3) |
| 442 | |
| 443 | The 2 fsbl partitions have the same content and are present to guarantee a |
| 444 | fail-safe update of FSBL; fsbl2 can be omitted if this ROM code feature is |
| 445 | not required. |
| 446 | |
| 447 | Without FIP support in TF-A_, the 3rd partition "fip" for u-boot.stm32 must |
| 448 | be named "ssbl". |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 449 | |
| 450 | Then the minimal GPT partition is: |
| 451 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 452 | For TF-A_ with FIP support: |
| 453 | |
| 454 | +-------+--------+---------+------------------------+ |
| 455 | | *Num* | *Name* | *Size* | *Content* | |
| 456 | +=======+========+=========+========================+ |
| 457 | | 1 | fsbl1 | 256 KiB | TF-A_ BL2 (tf-a.stm32) | |
| 458 | +-------+--------+---------+------------------------+ |
| 459 | | 2 | fsbl2 | 256 KiB | TF-A_ BL2 (tf-a.stm32) | |
| 460 | +-------+--------+---------+------------------------+ |
| 461 | | 3 | fip | 4MB | fip.bin | |
| 462 | +-------+--------+---------+------------------------+ |
| 463 | | 4 | <any> | <any> | Rootfs | |
| 464 | +-------+--------+---------+------------------------+ |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 465 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 466 | or: |
| 467 | |
| 468 | +-------+--------+---------+------------------------+------------------------+ |
| 469 | | *Num* | *Name* | *Size* | *Trusted boot content* | *Basic boot content* | |
| 470 | +=======+========+=========+========================+========================+ |
| 471 | | 1 | fsbl1 | 256 KiB | TF-A_ BL2 (tf-a.stm32) | SPL (u-boot-spl.stm32) | |
| 472 | +-------+--------+---------+------------------------+------------------------+ |
| 473 | | 2 | fsbl2 | 256 KiB | TF-A_ BL2 (tf-a.stm32) | SPL (u-boot-spl.stm32) | |
| 474 | +-------+--------+---------+------------------------+------------------------+ |
| 475 | | 3 | ssbl | 2MB | U-Boot (u-boot.stm32) | U-Boot (u-boot.img) | |
| 476 | +-------+--------+---------+------------------------+------------------------+ |
| 477 | | 4 | <any> | <any> | Rootfs | |
| 478 | +-------+--------+---------+------------------------+------------------------+ |
| 479 | |
| 480 | And the 4th partition (Rootfs) is marked bootable with a file extlinux.conf |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 481 | following the Generic Distribution feature (doc/README.distro for use). |
| 482 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 483 | The size of fip or ssbl partition must be enough for the associated binary file, |
| 484 | 4MB and 2MB are default values. |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 485 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 486 | According the used card reader select the correct block device |
| 487 | (for example /dev/sdx or /dev/mmcblk0), in the next example, it is /dev/mmcblk0 |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 488 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 489 | For example: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 490 | |
| 491 | a) remove previous formatting:: |
| 492 | |
| 493 | # sgdisk -o /dev/<SD card dev> |
| 494 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 495 | b) create minimal image for FIP |
| 496 | |
| 497 | For FIP support in TF-A_:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 498 | |
| 499 | # sgdisk --resize-table=128 -a 1 \ |
| 500 | -n 1:34:545 -c 1:fsbl1 \ |
| 501 | -n 2:546:1057 -c 2:fsbl2 \ |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 502 | -n 3:1058:9249 -c 3:fip \ |
| 503 | -n 4:9250: -c 4:rootfs -A 4:set:2 \ |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 504 | -p /dev/<SD card dev> |
| 505 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 506 | With gpt table with 128 entries an the partition 4 marked bootable (bit 2). |
| 507 | |
| 508 | For basic boot mode or without FIP support in TF-A_:: |
| 509 | |
| 510 | # sgdisk --resize-table=128 -a 1 \ |
| 511 | -n 1:34:545 -c 1:fsbl1 \ |
| 512 | -n 2:546:1057 -c 2:fsbl2 \ |
| 513 | -n 3:1058:5153 -c 3:ssbl \ |
| 514 | -n 4:5154: -c 4:rootfs -A 4:set:2 \ |
| 515 | -p /dev/<SD card dev> |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 516 | |
| 517 | c) copy the FSBL (2 times) and SSBL file on the correct partition. |
| 518 | in this example in partition 1 to 3 |
| 519 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 520 | for trusted boot: :: |
| 521 | |
| 522 | # dd if=tf-a.stm32 of=/dev/mmcblk0p1 |
| 523 | # dd if=tf-a.stm32 of=/dev/mmcblk0p2 |
| 524 | # dd if=fip.bin of=/dev/mmcblk0p3 |
| 525 | OR |
| 526 | dd if=u-boot.stm32 of=/dev/mmcblk0p3 # Without FIT support |
| 527 | |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 528 | for basic boot mode : <SD card dev> = /dev/mmcblk0:: |
| 529 | |
| 530 | # dd if=u-boot-spl.stm32 of=/dev/mmcblk0p1 |
| 531 | # dd if=u-boot-spl.stm32 of=/dev/mmcblk0p2 |
Marek Vasut | db4374f | 2021-03-06 21:44:17 +0100 | [diff] [blame] | 532 | # dd if=u-boot.img of=/dev/mmcblk0p3 # Without CONFIG_SPL_LOAD_FIT |
| 533 | OR |
| 534 | dd if=u-boot.itb of=/dev/mmcblk0p3 # With CONFIG_SPL_LOAD_FIT=y |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 535 | |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 536 | To boot from SD card, select BootPinMode = 1 0 1 and reset. |
| 537 | |
| 538 | Prepare eMMC |
| 539 | ------------ |
| 540 | |
| 541 | You can use U-Boot to copy binary in eMMC. |
| 542 | |
| 543 | In the next example, you need to boot from SD card and the images |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 544 | (tf-a.stm32, fip.bin / u-boot-spl.stm32, u-boot.img for systems without |
| 545 | CONFIG_SPL_LOAD_FIT or u-boot.itb for systems with CONFIG_SPL_LOAD_FIT=y) are |
| 546 | presents on SD card (mmc 0) in ext4 partition 4 (bootfs) |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 547 | |
| 548 | To boot from SD card, select BootPinMode = 1 0 1 and reset. |
| 549 | |
| 550 | Then you update the eMMC with the next U-Boot command : |
| 551 | |
| 552 | a) prepare GPT on eMMC, |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 553 | example with 3 partitions, fip, bootfs and roots:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 554 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 555 | # setenv emmc_part "name=fip,size=4MiB;name=bootfs,type=linux,bootable,size=64MiB;name=rootfs,type=linux,size=512" |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 556 | # gpt write mmc 1 ${emmc_part} |
| 557 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 558 | b) copy FSBL, TF-A_ or SPL, on first eMMC boot partition |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 559 | (SPL max size is 256kB, with LBA 512, 0x200):: |
| 560 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 561 | # ext4load mmc 0:4 0xC0000000 tf-a.stm32 |
| 562 | or |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 563 | # ext4load mmc 0:4 0xC0000000 u-boot-spl.stm32 |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 564 | |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 565 | # mmc dev 1 |
| 566 | # mmc partconf 1 1 1 1 |
| 567 | # mmc write ${fileaddr} 0 200 |
| 568 | # mmc partconf 1 1 1 0 |
| 569 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 570 | c) copy SSBL, FIP or U-Boot binary, in first GPT partition of eMMC:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 571 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 572 | # ext4load mmc 0:4 0xC0000000 fip.bin |
| 573 | or |
Marek Vasut | db4374f | 2021-03-06 21:44:17 +0100 | [diff] [blame] | 574 | # ext4load mmc 0:4 0xC0000000 u-boot.img # Without CONFIG_SPL_LOAD_FIT |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 575 | or |
| 576 | # ext4load mmc 0:4 0xC0000000 u-boot.itb # With CONFIG_SPL_LOAD_FIT=y |
| 577 | |
| 578 | |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 579 | # mmc dev 1 |
| 580 | # part start mmc 1 1 partstart |
| 581 | # mmc write ${fileaddr} ${partstart} ${filesize} |
| 582 | |
| 583 | To boot from eMMC, select BootPinMode = 0 1 0 and reset. |
| 584 | |
| 585 | MAC Address |
| 586 | ----------- |
| 587 | |
| 588 | Please read doc/README.enetaddr for the implementation guidelines for mac id |
| 589 | usage. Basically, environment has precedence over board specific storage. |
| 590 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 591 | For STMicroelectronics board, it is retrieved in: |
| 592 | |
| 593 | - STM32MP15x OTP: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 594 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 595 | - OTP_57[31:0] = MAC_ADDR[31:0] |
| 596 | - OTP_58[15:0] = MAC_ADDR[47:32] |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 597 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 598 | - STM32MP13x OTP: |
| 599 | |
| 600 | - OTP_57[31:0] = MAC_ADDR0[31:0] |
| 601 | - OTP_58[15:0] = MAC_ADDR0[47:32] |
| 602 | - OTP_58[31:16] = MAC_ADDR1[15:0] |
| 603 | - OTP_59[31:0] = MAC_ADDR1[47:16] |
| 604 | |
| 605 | To program a MAC address on virgin STM32MP15x OTP words above, you can use the fuse command |
Patrick Delaunay | b10cddf | 2020-02-12 19:37:38 +0100 | [diff] [blame] | 606 | on bank 0 to access to internal OTP and lock them: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 607 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 608 | In the next example we are using the 2 OTPs used on STM32MP15x. |
| 609 | |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 610 | Prerequisite: check if a MAC address isn't yet programmed in OTP |
| 611 | |
Patrick Delaunay | b10cddf | 2020-02-12 19:37:38 +0100 | [diff] [blame] | 612 | 1) check OTP: their value must be equal to 0:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 613 | |
Patrick Delaunay | b10cddf | 2020-02-12 19:37:38 +0100 | [diff] [blame] | 614 | STM32MP> fuse sense 0 57 2 |
| 615 | Sensing bank 0: |
| 616 | Word 0x00000039: 00000000 00000000 |
| 617 | |
| 618 | 2) check environment variable:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 619 | |
Patrick Delaunay | b10cddf | 2020-02-12 19:37:38 +0100 | [diff] [blame] | 620 | STM32MP> env print ethaddr |
| 621 | ## Error: "ethaddr" not defined |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 622 | |
Patrick Delaunay | b10cddf | 2020-02-12 19:37:38 +0100 | [diff] [blame] | 623 | 3) check lock status of fuse 57 & 58 (at 0x39, 0=unlocked, 1=locked):: |
| 624 | |
| 625 | STM32MP> fuse sense 0 0x10000039 2 |
| 626 | Sensing bank 0: |
| 627 | Word 0x10000039: 00000000 00000000 |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 628 | |
| 629 | Example to set mac address "12:34:56:78:9a:bc" |
| 630 | |
| 631 | 1) Write OTP:: |
| 632 | |
| 633 | STM32MP> fuse prog -y 0 57 0x78563412 0x0000bc9a |
| 634 | |
| 635 | 2) Read OTP:: |
| 636 | |
| 637 | STM32MP> fuse sense 0 57 2 |
| 638 | Sensing bank 0: |
| 639 | Word 0x00000039: 78563412 0000bc9a |
| 640 | |
Patrick Delaunay | b10cddf | 2020-02-12 19:37:38 +0100 | [diff] [blame] | 641 | 3) Lock OTP:: |
| 642 | |
| 643 | STM32MP> fuse prog 0 0x10000039 1 1 |
| 644 | |
| 645 | STM32MP> fuse sense 0 0x10000039 2 |
| 646 | Sensing bank 0: |
| 647 | Word 0x10000039: 00000001 00000001 |
| 648 | |
| 649 | 4) next REBOOT, in the trace:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 650 | |
| 651 | ### Setting environment from OTP MAC address = "12:34:56:78:9a:bc" |
| 652 | |
Patrick Delaunay | b10cddf | 2020-02-12 19:37:38 +0100 | [diff] [blame] | 653 | 5) check env update:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 654 | |
| 655 | STM32MP> env print ethaddr |
| 656 | ethaddr=12:34:56:78:9a:bc |
| 657 | |
| 658 | .. warning:: This command can't be executed twice on the same board as |
| 659 | OTP are protected. It is already done for the board |
| 660 | provided by STMicroelectronics. |
| 661 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 662 | Coprocessor firmware on STM32MP15x |
| 663 | ---------------------------------- |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 664 | |
| 665 | U-Boot can boot the coprocessor before the kernel (coprocessor early boot). |
| 666 | |
| 667 | a) Manuallly by using rproc commands (update the bootcmd) |
| 668 | |
| 669 | Configurations:: |
| 670 | |
| 671 | # env set name_copro "rproc-m4-fw.elf" |
| 672 | # env set dev_copro 0 |
| 673 | # env set loadaddr_copro 0xC1000000 |
| 674 | |
| 675 | Load binary from bootfs partition (number 4) on SD card (mmc 0):: |
| 676 | |
| 677 | # ext4load mmc 0:4 ${loadaddr_copro} ${name_copro} |
| 678 | |
| 679 | => ${filesize} variable is updated with the size of the loaded file. |
| 680 | |
| 681 | Start M4 firmware with remote proc command:: |
| 682 | |
| 683 | # rproc init |
| 684 | # rproc load ${dev_copro} ${loadaddr_copro} ${filesize} |
| 685 | # rproc start ${dev_copro}"00270033 |
| 686 | |
| 687 | b) Automatically by using FIT feature and generic DISTRO bootcmd |
| 688 | |
| 689 | see examples in the board stm32mp1 directory: fit_copro_kernel_dtb.its |
| 690 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 691 | Generate FIT including kernel + device tree + M4 firmware with cfg with M4 |
| 692 | boot:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 693 | |
| 694 | $> mkimage -f fit_copro_kernel_dtb.its fit_copro_kernel_dtb.itb |
| 695 | |
| 696 | Then using DISTRO configuration file: see extlinux.conf to select the correct |
| 697 | configuration: |
| 698 | |
| 699 | - stm32mp157c-ev1-m4 |
| 700 | - stm32mp157c-dk2-m4 |
| 701 | |
| 702 | DFU support |
| 703 | ----------- |
| 704 | |
| 705 | The DFU is supported on ST board. |
| 706 | |
| 707 | The env variable dfu_alt_info is automatically build, and all |
| 708 | the memory present on the ST boards are exported. |
| 709 | |
| 710 | The dfu mode is started by the command:: |
| 711 | |
| 712 | STM32MP> dfu 0 |
| 713 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 714 | On EV1 board, booting from SD card, without OP-TEE_:: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 715 | |
| 716 | STM32MP> dfu 0 list |
| 717 | DFU alt settings list: |
| 718 | dev: RAM alt: 0 name: uImage layout: RAM_ADDR |
| 719 | dev: RAM alt: 1 name: devicetree.dtb layout: RAM_ADDR |
| 720 | dev: RAM alt: 2 name: uramdisk.image.gz layout: RAM_ADDR |
Patrick Delaunay | ccf64ef | 2020-03-18 09:22:54 +0100 | [diff] [blame] | 721 | dev: eMMC alt: 3 name: mmc0_fsbl1 layout: RAW_ADDR |
| 722 | dev: eMMC alt: 4 name: mmc0_fsbl2 layout: RAW_ADDR |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 723 | dev: eMMC alt: 5 name: mmc0_fip layout: RAW_ADDR |
Patrick Delaunay | ccf64ef | 2020-03-18 09:22:54 +0100 | [diff] [blame] | 724 | dev: eMMC alt: 6 name: mmc0_bootfs layout: RAW_ADDR |
| 725 | dev: eMMC alt: 7 name: mmc0_vendorfs layout: RAW_ADDR |
| 726 | dev: eMMC alt: 8 name: mmc0_rootfs layout: RAW_ADDR |
| 727 | dev: eMMC alt: 9 name: mmc0_userfs layout: RAW_ADDR |
| 728 | dev: eMMC alt: 10 name: mmc1_boot1 layout: RAW_ADDR |
| 729 | dev: eMMC alt: 11 name: mmc1_boot2 layout: RAW_ADDR |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 730 | dev: eMMC alt: 12 name: mmc1_fip layout: RAW_ADDR |
Patrick Delaunay | ccf64ef | 2020-03-18 09:22:54 +0100 | [diff] [blame] | 731 | dev: eMMC alt: 13 name: mmc1_bootfs layout: RAW_ADDR |
| 732 | dev: eMMC alt: 14 name: mmc1_vendorfs layout: RAW_ADDR |
| 733 | dev: eMMC alt: 15 name: mmc1_rootfs layout: RAW_ADDR |
| 734 | dev: eMMC alt: 16 name: mmc1_userfs layout: RAW_ADDR |
| 735 | dev: MTD alt: 17 name: nor0 layout: RAW_ADDR |
Patrick Delaunay | b82c97e | 2021-11-25 11:54:53 +0100 | [diff] [blame] | 736 | dev: MTD alt: 18 name: nor1 layout: RAW_ADDR |
| 737 | dev: MTD alt: 19 name: nand0 layout: RAW_ADDR |
| 738 | dev: VIRT alt: 20 name: OTP layout: RAW_ADDR |
| 739 | dev: VIRT alt: 21 name: PMIC layout: RAW_ADDR |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 740 | |
| 741 | All the supported device are exported for dfu-util tool:: |
| 742 | |
| 743 | $> dfu-util -l |
Patrick Delaunay | b82c97e | 2021-11-25 11:54:53 +0100 | [diff] [blame] | 744 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=21, name="PMIC", serial="002700333338511934383330" |
| 745 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=20, name="OTP", serial="002700333338511934383330" |
| 746 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=19, name="nand0", serial="002700333338511934383330" |
| 747 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=18, name="nor1", serial="002700333338511934383330" |
Patrick Delaunay | ccf64ef | 2020-03-18 09:22:54 +0100 | [diff] [blame] | 748 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=17, name="nor0", serial="002700333338511934383330" |
| 749 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=16, name="mmc1_userfs", serial="002700333338511934383330" |
| 750 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=15, name="mmc1_rootfs", serial="002700333338511934383330" |
| 751 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=14, name="mmc1_vendorfs", serial="002700333338511934383330" |
| 752 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=13, name="mmc1_bootfs", serial="002700333338511934383330" |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 753 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=12, name="mmc1_fip", serial="002700333338511934383330" |
Patrick Delaunay | ccf64ef | 2020-03-18 09:22:54 +0100 | [diff] [blame] | 754 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=11, name="mmc1_boot2", serial="002700333338511934383330" |
| 755 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=10, name="mmc1_boot1", serial="002700333338511934383330" |
| 756 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=9, name="mmc0_userfs", serial="002700333338511934383330" |
| 757 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=8, name="mmc0_rootfs", serial="002700333338511934383330" |
| 758 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=7, name="mmc0_vendorfs", serial="002700333338511934383330" |
| 759 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=6, name="mmc0_bootfs", serial="002700333338511934383330" |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 760 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=5, name="mmc0_fip", serial="002700333338511934383330" |
Patrick Delaunay | ccf64ef | 2020-03-18 09:22:54 +0100 | [diff] [blame] | 761 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=4, name="mmc0_fsbl2", serial="002700333338511934383330" |
| 762 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=3, name="mmc0_fsbl1", serial="002700333338511934383330" |
| 763 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=2, name="uramdisk.image.gz", serial="002700333338511934383330" |
| 764 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=1, name="devicetree.dtb", serial="002700333338511934383330" |
| 765 | Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=0, name="uImage", serial="002700333338511934383330" |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 766 | |
| 767 | You can update the boot device: |
| 768 | |
Patrick Delaunay | a1d36ed | 2022-05-20 18:24:54 +0200 | [diff] [blame] | 769 | - SD card (mmc0):: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 770 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 771 | $> dfu-util -d 0483:5720 -a 3 -D tf-a-stm32mp157c-ev1.stm32 |
| 772 | $> dfu-util -d 0483:5720 -a 4 -D tf-a-stm32mp157c-ev1.stm32 |
| 773 | $> dfu-util -d 0483:5720 -a 5 -D fip-stm32mp157c-ev1.bin |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 774 | $> dfu-util -d 0483:5720 -a 6 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4 |
| 775 | $> dfu-util -d 0483:5720 -a 7 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4 |
| 776 | $> dfu-util -d 0483:5720 -a 8 -D st-image-weston-openstlinux-weston-stm32mp1.ext4 |
| 777 | $> dfu-util -d 0483:5720 -a 9 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4 |
| 778 | |
| 779 | - EMMC (mmc1):: |
| 780 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 781 | $> dfu-util -d 0483:5720 -a 10 -D tf-a-stm32mp157c-ev1.stm32 |
| 782 | $> dfu-util -d 0483:5720 -a 11 -D tf-a-stm32mp157c-ev1.stm32 |
| 783 | $> dfu-util -d 0483:5720 -a 12 -D fip-stm32mp157c-ev1.bin |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 784 | $> dfu-util -d 0483:5720 -a 13 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4 |
| 785 | $> dfu-util -d 0483:5720 -a 14 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4 |
| 786 | $> dfu-util -d 0483:5720 -a 15 -D st-image-weston-openstlinux-weston-stm32mp1.ext4 |
| 787 | $> dfu-util -d 0483:5720 -a 16 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4 |
| 788 | |
Patrick Delaunay | ccf64ef | 2020-03-18 09:22:54 +0100 | [diff] [blame] | 789 | - you can also dump the OTP and the PMIC NVM with:: |
| 790 | |
| 791 | $> dfu-util -d 0483:5720 -a 19 -U otp.bin |
| 792 | $> dfu-util -d 0483:5720 -a 20 -U pmic.bin |
| 793 | |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 794 | |
Patrick Delaunay | ccf64ef | 2020-03-18 09:22:54 +0100 | [diff] [blame] | 795 | When the board is booting for nor0 or nand0, |
| 796 | only the MTD partition on the boot devices are available, for example: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 797 | |
Patrick Delaunay | b82c97e | 2021-11-25 11:54:53 +0100 | [diff] [blame] | 798 | - NOR (nor0 = alt 20, nor1 = alt 26) & NAND (nand0 = alt 27) : |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 799 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 800 | $> dfu-util -d 0483:5720 -a 21 -D tf-a-stm32mp157c-ev1.stm32 |
| 801 | $> dfu-util -d 0483:5720 -a 22 -D tf-a-stm32mp157c-ev1.stm32 |
| 802 | $> dfu-util -d 0483:5720 -a 23 -D fip-stm32mp157c-ev1.bin |
Patrick Delaunay | b82c97e | 2021-11-25 11:54:53 +0100 | [diff] [blame] | 803 | $> dfu-util -d 0483:5720 -a 28 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 804 | |
Patrick Delaunay | ccf64ef | 2020-03-18 09:22:54 +0100 | [diff] [blame] | 805 | - NAND (nand0 = alt 21):: |
Patrick Delaunay | 5f6fdcc | 2020-02-25 19:04:14 +0100 | [diff] [blame] | 806 | |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 807 | $> dfu-util -d 0483:5720 -a 22 -D tf-a-stm32mp157c-ev1.stm32 |
| 808 | $> dfu-util -d 0483:5720 -a 23 -D fip-stm32mp157c-ev1.bin |
| 809 | $> dfu-util -d 0483:5720 -a 24 -D fip-stm32mp157c-ev1.bin |
Patrick Delaunay | ccf64ef | 2020-03-18 09:22:54 +0100 | [diff] [blame] | 810 | $> dfu-util -d 0483:5720 -a 25 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi |
Patrick Delaunay | 3e70d3c | 2021-07-26 11:21:37 +0200 | [diff] [blame] | 811 | |
| 812 | References |
| 813 | ---------- |
| 814 | |
| 815 | .. _WIKI: |
| 816 | |
| 817 | STM32 Arm® Cortex®-based MPUs user guide |
| 818 | |
| 819 | + https://wiki.st.com/ |
| 820 | + https://wiki.st.com/stm32mpu/wiki/Main_Page |
| 821 | |
| 822 | .. _TF-A: |
| 823 | |
| 824 | TF-A = The Trusted Firmware-A project provides a reference implementation of |
| 825 | secure world software for Armv7-A and Armv8-A class processors |
| 826 | |
| 827 | + https://www.trustedfirmware.org/projects/tf-a/ |
| 828 | + https://trustedfirmware-a.readthedocs.io/en/latest/ |
| 829 | + https://trustedfirmware-a.readthedocs.io/en/latest/plat/stm32mp1.html |
| 830 | + https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/ |
| 831 | |
| 832 | .. _OP-TEE: |
| 833 | |
| 834 | OP-TEE = an open source Trusted Execution Environment (TEE) implementing the |
| 835 | Arm TrustZone technology |
| 836 | |
| 837 | + https://www.op-tee.org/ |
| 838 | + https://optee.readthedocs.io/en/latest/ |
| 839 | + https://optee.readthedocs.io/en/latest/building/devices/stm32mp1.html |
| 840 | + https://github.com/OP-TEE/optee_os |