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git01.mediatek.com / filogic / uboot / 0997ee033eceba9927993a8b2afe485f9ad58789 / . / configs / 3c120_defconfig
blob: a4b1b924f7deb83779ca07d034904428a06cde52 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_NIOS2=y
Thomas Chou930de0b2015-11-11 07:56:04 +0800[diff] [blame]2CONFIG_SYS_CONFIG_NAME="3c120_devboard"
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]3CONFIG_NR_DRAM_BANKS=1
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]4CONFIG_ENV_SIZE=0x20000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]5CONFIG_ENV_SECT_SIZE=0x20000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]6CONFIG_DM_GPIO=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]7CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard"
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame^]8CONFIG_SYS_LOAD_ADDR=0xd4000000
Marek Vasut9d1f3672015-12-16 01:32:47 +0100[diff] [blame]9CONFIG_FIT=y
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]10# CONFIG_AUTOBOOT is not set
Simon Glassbd5618d2016-10-17 20:13:00 -0600[diff] [blame]11CONFIG_SYS_CONSOLE_INFO_QUIET=y
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]12CONFIG_DISPLAY_BOARDINFO_LATE=y
Thomas Chou44d3cf42015-08-26 21:24:35 +0800[diff] [blame]13CONFIG_HUSH_PARSER=y
Thomas Chouc6170262015-10-21 21:34:57 +0800[diff] [blame]14CONFIG_CMD_CPU=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]15# CONFIG_CMD_BOOTD is not set
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]16# CONFIG_CMD_XIMG is not set
Thomas Chou3a077cd2015-11-11 21:39:33 +0800[diff] [blame]17CONFIG_CMD_GPIO=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]18# CONFIG_CMD_ITEST is not set
Thomas Chou44d3cf42015-08-26 21:24:35 +0800[diff] [blame]19CONFIG_CMD_DHCP=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]20# CONFIG_CMD_NFS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]21CONFIG_CMD_MII=y
Thomas Chou44d3cf42015-08-26 21:24:35 +0800[diff] [blame]22CONFIG_CMD_PING=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]23CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]24CONFIG_ENV_IS_IN_FLASH=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]25CONFIG_ENV_ADDR=0xE2880000
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]26CONFIG_VERSION_VARIABLE=y
Thomas Choue0e97692015-08-29 15:24:01 +0800[diff] [blame]27CONFIG_NET_RANDOM_ETHADDR=y
Thomas Choufb1a4bf2015-10-21 21:33:45 +0800[diff] [blame]28CONFIG_ALTERA_PIO=y
Thomas Chou36b9c9a2015-10-14 08:43:31 +0800[diff] [blame]29CONFIG_MISC=y
30CONFIG_ALTERA_SYSID=y
Miquel Raynala903be42019-10-03 19:50:04 +0200[diff] [blame]31CONFIG_DM_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]32CONFIG_MTD_NOR_FLASH=y
Thomas Chouf0f9acc2015-10-28 15:10:39 +0800[diff] [blame]33CONFIG_CFI_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]34CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
35CONFIG_SYS_FLASH_PROTECTION=y
36CONFIG_SYS_FLASH_CFI=y
Mario Sixf504d1a2018-04-27 14:52:21 +0200[diff] [blame]37CONFIG_PHY_MARVELL=y
Thomas Chouec06dd82015-10-22 15:29:11 +0800[diff] [blame]38CONFIG_DM_ETH=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]39CONFIG_PHY_GIGE=y
Thomas Chouec06dd82015-10-22 15:29:11 +0800[diff] [blame]40CONFIG_ALTERA_TSE=y
Heiko Schocher20ea7ab2016-09-09 08:12:49 +0200[diff] [blame]41CONFIG_DM_SERIAL=y
Thomas Chou26066df2015-10-23 07:36:37 +0800[diff] [blame]42CONFIG_ALTERA_JTAG_UART=y
43CONFIG_ALTERA_JTAG_UART_BYPASS=y
Thomas Chou221d2ac2015-10-22 22:28:53 +0800[diff] [blame]44CONFIG_TIMER=y
45CONFIG_ALTERA_TIMER=y