blob: baf29420f0b6bc3c6212e445bac049b97d34f854 [file] [log] [blame]
Peter Tyserae7a7d42009-06-30 17:15:40 -05001/*
2 * Copyright 2004,2007,2008 Freescale Semiconductor, Inc.
3 * (C) Copyright 2002, 2003 Motorola Inc.
4 * Xianghua Xiao (X.Xiao@motorola.com)
5 *
6 * (C) Copyright 2000
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <config.h>
29#include <common.h>
30#include <asm/fsl_dma.h>
31
32#if defined(CONFIG_MPC85xx)
33volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR);
34#elif defined(CONFIG_MPC86xx)
35volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR);
36#else
37#error "Freescale DMA engine not supported on your processor"
38#endif
39
40static void dma_sync(void)
41{
42#if defined(CONFIG_MPC85xx)
43 asm("sync; isync; msync");
44#elif defined(CONFIG_MPC86xx)
45 asm("sync; isync");
46#endif
47}
48
49static uint dma_check(void) {
50 volatile fsl_dma_t *dma = &dma_base->dma[0];
51 volatile uint status = dma->sr;
52
53 /* While the channel is busy, spin */
Peter Tyser09912162009-06-30 17:15:41 -050054 while (status & FSL_DMA_SR_CB)
Peter Tyserae7a7d42009-06-30 17:15:40 -050055 status = dma->sr;
56
57 /* clear MR[CS] channel start bit */
Peter Tyser09912162009-06-30 17:15:41 -050058 dma->mr &= FSL_DMA_MR_CS;
Peter Tyserae7a7d42009-06-30 17:15:40 -050059 dma_sync();
60
61 if (status != 0)
62 printf ("DMA Error: status = %x\n", status);
63
64 return status;
65}
66
67void dma_init(void) {
68 volatile fsl_dma_t *dma = &dma_base->dma[0];
69
Peter Tyser09912162009-06-30 17:15:41 -050070 dma->satr = FSL_DMA_SATR_SREAD_NO_SNOOP;
71 dma->datr = FSL_DMA_DATR_DWRITE_NO_SNOOP;
Peter Tyserae7a7d42009-06-30 17:15:40 -050072 dma->sr = 0xffffffff; /* clear any errors */
73 dma_sync();
74}
75
76int dma_xfer(void *dest, uint count, void *src) {
77 volatile fsl_dma_t *dma = &dma_base->dma[0];
78
79 dma->dar = (uint) dest;
80 dma->sar = (uint) src;
81 dma->bcr = count;
82
83 /* Disable bandwidth control, use direct transfer mode */
Peter Tyser09912162009-06-30 17:15:41 -050084 dma->mr = FSL_DMA_MR_BWC_DIS | FSL_DMA_MR_CTM_DIRECT;
Peter Tyserae7a7d42009-06-30 17:15:40 -050085 dma_sync();
86
87 /* Start the transfer */
Peter Tyser09912162009-06-30 17:15:41 -050088 dma->mr = FSL_DMA_MR_BWC_DIS | FSL_DMA_MR_CTM_DIRECT | FSL_DMA_MR_CS;
Peter Tyserae7a7d42009-06-30 17:15:40 -050089 dma_sync();
90
91 return dma_check();
92}