Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 1 | /* DO NOT EDIT THIS FILE |
| 2 | * Automatically generated by generate-cdef-headers.xsl |
| 3 | * DO NOT EDIT THIS FILE |
| 4 | */ |
| 5 | |
| 6 | #ifndef __BFIN_CDEF_ADSP_BF523_proc__ |
| 7 | #define __BFIN_CDEF_ADSP_BF523_proc__ |
| 8 | |
| 9 | #include "../mach-common/ADSP-EDN-core_cdef.h" |
| 10 | |
| 11 | #include "ADSP-EDN-BF52x-extended_cdef.h" |
| 12 | |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 13 | #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL) |
| 14 | #define bfin_write_PLL_CTL(val) bfin_write16(PLL_CTL, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 15 | #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV) |
| 16 | #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 17 | #define bfin_read_VR_CTL() bfin_read16(VR_CTL) |
| 18 | #define bfin_write_VR_CTL(val) bfin_write16(VR_CTL, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 19 | #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT) |
| 20 | #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 21 | #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT) |
| 22 | #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 23 | #define bfin_read_CHIPID() bfin_read32(CHIPID) |
| 24 | #define bfin_write_CHIPID(val) bfin_write32(CHIPID, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 25 | #define bfin_read_SWRST() bfin_read16(SWRST) |
| 26 | #define bfin_write_SWRST(val) bfin_write16(SWRST, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 27 | #define bfin_read_SYSCR() bfin_read16(SYSCR) |
| 28 | #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 29 | #define bfin_read_SRAM_BASE_ADDR() bfin_readPTR(SRAM_BASE_ADDR) |
| 30 | #define bfin_write_SRAM_BASE_ADDR(val) bfin_writePTR(SRAM_BASE_ADDR, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 31 | #define bfin_read_DMEM_CONTROL() bfin_read32(DMEM_CONTROL) |
| 32 | #define bfin_write_DMEM_CONTROL(val) bfin_write32(DMEM_CONTROL, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 33 | #define bfin_read_DCPLB_STATUS() bfin_read32(DCPLB_STATUS) |
| 34 | #define bfin_write_DCPLB_STATUS(val) bfin_write32(DCPLB_STATUS, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 35 | #define bfin_read_DCPLB_FAULT_ADDR() bfin_readPTR(DCPLB_FAULT_ADDR) |
| 36 | #define bfin_write_DCPLB_FAULT_ADDR(val) bfin_writePTR(DCPLB_FAULT_ADDR, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 37 | #define bfin_read_DCPLB_ADDR0() bfin_readPTR(DCPLB_ADDR0) |
| 38 | #define bfin_write_DCPLB_ADDR0(val) bfin_writePTR(DCPLB_ADDR0, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 39 | #define bfin_read_DCPLB_ADDR1() bfin_readPTR(DCPLB_ADDR1) |
| 40 | #define bfin_write_DCPLB_ADDR1(val) bfin_writePTR(DCPLB_ADDR1, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 41 | #define bfin_read_DCPLB_ADDR2() bfin_readPTR(DCPLB_ADDR2) |
| 42 | #define bfin_write_DCPLB_ADDR2(val) bfin_writePTR(DCPLB_ADDR2, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 43 | #define bfin_read_DCPLB_ADDR3() bfin_readPTR(DCPLB_ADDR3) |
| 44 | #define bfin_write_DCPLB_ADDR3(val) bfin_writePTR(DCPLB_ADDR3, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 45 | #define bfin_read_DCPLB_ADDR4() bfin_readPTR(DCPLB_ADDR4) |
| 46 | #define bfin_write_DCPLB_ADDR4(val) bfin_writePTR(DCPLB_ADDR4, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 47 | #define bfin_read_DCPLB_ADDR5() bfin_readPTR(DCPLB_ADDR5) |
| 48 | #define bfin_write_DCPLB_ADDR5(val) bfin_writePTR(DCPLB_ADDR5, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 49 | #define bfin_read_DCPLB_ADDR6() bfin_readPTR(DCPLB_ADDR6) |
| 50 | #define bfin_write_DCPLB_ADDR6(val) bfin_writePTR(DCPLB_ADDR6, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 51 | #define bfin_read_DCPLB_ADDR7() bfin_readPTR(DCPLB_ADDR7) |
| 52 | #define bfin_write_DCPLB_ADDR7(val) bfin_writePTR(DCPLB_ADDR7, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 53 | #define bfin_read_DCPLB_ADDR8() bfin_readPTR(DCPLB_ADDR8) |
| 54 | #define bfin_write_DCPLB_ADDR8(val) bfin_writePTR(DCPLB_ADDR8, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 55 | #define bfin_read_DCPLB_ADDR9() bfin_readPTR(DCPLB_ADDR9) |
| 56 | #define bfin_write_DCPLB_ADDR9(val) bfin_writePTR(DCPLB_ADDR9, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 57 | #define bfin_read_DCPLB_ADDR10() bfin_readPTR(DCPLB_ADDR10) |
| 58 | #define bfin_write_DCPLB_ADDR10(val) bfin_writePTR(DCPLB_ADDR10, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 59 | #define bfin_read_DCPLB_ADDR11() bfin_readPTR(DCPLB_ADDR11) |
| 60 | #define bfin_write_DCPLB_ADDR11(val) bfin_writePTR(DCPLB_ADDR11, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 61 | #define bfin_read_DCPLB_ADDR12() bfin_readPTR(DCPLB_ADDR12) |
| 62 | #define bfin_write_DCPLB_ADDR12(val) bfin_writePTR(DCPLB_ADDR12, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 63 | #define bfin_read_DCPLB_ADDR13() bfin_readPTR(DCPLB_ADDR13) |
| 64 | #define bfin_write_DCPLB_ADDR13(val) bfin_writePTR(DCPLB_ADDR13, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 65 | #define bfin_read_DCPLB_ADDR14() bfin_readPTR(DCPLB_ADDR14) |
| 66 | #define bfin_write_DCPLB_ADDR14(val) bfin_writePTR(DCPLB_ADDR14, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 67 | #define bfin_read_DCPLB_ADDR15() bfin_readPTR(DCPLB_ADDR15) |
| 68 | #define bfin_write_DCPLB_ADDR15(val) bfin_writePTR(DCPLB_ADDR15, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 69 | #define bfin_read_DCPLB_DATA0() bfin_read32(DCPLB_DATA0) |
| 70 | #define bfin_write_DCPLB_DATA0(val) bfin_write32(DCPLB_DATA0, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 71 | #define bfin_read_DCPLB_DATA1() bfin_read32(DCPLB_DATA1) |
| 72 | #define bfin_write_DCPLB_DATA1(val) bfin_write32(DCPLB_DATA1, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 73 | #define bfin_read_DCPLB_DATA2() bfin_read32(DCPLB_DATA2) |
| 74 | #define bfin_write_DCPLB_DATA2(val) bfin_write32(DCPLB_DATA2, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 75 | #define bfin_read_DCPLB_DATA3() bfin_read32(DCPLB_DATA3) |
| 76 | #define bfin_write_DCPLB_DATA3(val) bfin_write32(DCPLB_DATA3, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 77 | #define bfin_read_DCPLB_DATA4() bfin_read32(DCPLB_DATA4) |
| 78 | #define bfin_write_DCPLB_DATA4(val) bfin_write32(DCPLB_DATA4, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 79 | #define bfin_read_DCPLB_DATA5() bfin_read32(DCPLB_DATA5) |
| 80 | #define bfin_write_DCPLB_DATA5(val) bfin_write32(DCPLB_DATA5, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 81 | #define bfin_read_DCPLB_DATA6() bfin_read32(DCPLB_DATA6) |
| 82 | #define bfin_write_DCPLB_DATA6(val) bfin_write32(DCPLB_DATA6, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 83 | #define bfin_read_DCPLB_DATA7() bfin_read32(DCPLB_DATA7) |
| 84 | #define bfin_write_DCPLB_DATA7(val) bfin_write32(DCPLB_DATA7, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 85 | #define bfin_read_DCPLB_DATA8() bfin_read32(DCPLB_DATA8) |
| 86 | #define bfin_write_DCPLB_DATA8(val) bfin_write32(DCPLB_DATA8, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 87 | #define bfin_read_DCPLB_DATA9() bfin_read32(DCPLB_DATA9) |
| 88 | #define bfin_write_DCPLB_DATA9(val) bfin_write32(DCPLB_DATA9, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 89 | #define bfin_read_DCPLB_DATA10() bfin_read32(DCPLB_DATA10) |
| 90 | #define bfin_write_DCPLB_DATA10(val) bfin_write32(DCPLB_DATA10, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 91 | #define bfin_read_DCPLB_DATA11() bfin_read32(DCPLB_DATA11) |
| 92 | #define bfin_write_DCPLB_DATA11(val) bfin_write32(DCPLB_DATA11, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 93 | #define bfin_read_DCPLB_DATA12() bfin_read32(DCPLB_DATA12) |
| 94 | #define bfin_write_DCPLB_DATA12(val) bfin_write32(DCPLB_DATA12, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 95 | #define bfin_read_DCPLB_DATA13() bfin_read32(DCPLB_DATA13) |
| 96 | #define bfin_write_DCPLB_DATA13(val) bfin_write32(DCPLB_DATA13, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 97 | #define bfin_read_DCPLB_DATA14() bfin_read32(DCPLB_DATA14) |
| 98 | #define bfin_write_DCPLB_DATA14(val) bfin_write32(DCPLB_DATA14, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 99 | #define bfin_read_DCPLB_DATA15() bfin_read32(DCPLB_DATA15) |
| 100 | #define bfin_write_DCPLB_DATA15(val) bfin_write32(DCPLB_DATA15, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 101 | #define bfin_read_DTEST_COMMAND() bfin_read32(DTEST_COMMAND) |
| 102 | #define bfin_write_DTEST_COMMAND(val) bfin_write32(DTEST_COMMAND, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 103 | #define bfin_read_DTEST_DATA0() bfin_read32(DTEST_DATA0) |
| 104 | #define bfin_write_DTEST_DATA0(val) bfin_write32(DTEST_DATA0, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 105 | #define bfin_read_DTEST_DATA1() bfin_read32(DTEST_DATA1) |
| 106 | #define bfin_write_DTEST_DATA1(val) bfin_write32(DTEST_DATA1, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 107 | #define bfin_read_IMEM_CONTROL() bfin_read32(IMEM_CONTROL) |
| 108 | #define bfin_write_IMEM_CONTROL(val) bfin_write32(IMEM_CONTROL, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 109 | #define bfin_read_ICPLB_STATUS() bfin_read32(ICPLB_STATUS) |
| 110 | #define bfin_write_ICPLB_STATUS(val) bfin_write32(ICPLB_STATUS, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 111 | #define bfin_read_ICPLB_FAULT_ADDR() bfin_readPTR(ICPLB_FAULT_ADDR) |
| 112 | #define bfin_write_ICPLB_FAULT_ADDR(val) bfin_writePTR(ICPLB_FAULT_ADDR, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 113 | #define bfin_read_ICPLB_ADDR0() bfin_readPTR(ICPLB_ADDR0) |
| 114 | #define bfin_write_ICPLB_ADDR0(val) bfin_writePTR(ICPLB_ADDR0, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 115 | #define bfin_read_ICPLB_ADDR1() bfin_readPTR(ICPLB_ADDR1) |
| 116 | #define bfin_write_ICPLB_ADDR1(val) bfin_writePTR(ICPLB_ADDR1, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 117 | #define bfin_read_ICPLB_ADDR2() bfin_readPTR(ICPLB_ADDR2) |
| 118 | #define bfin_write_ICPLB_ADDR2(val) bfin_writePTR(ICPLB_ADDR2, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 119 | #define bfin_read_ICPLB_ADDR3() bfin_readPTR(ICPLB_ADDR3) |
| 120 | #define bfin_write_ICPLB_ADDR3(val) bfin_writePTR(ICPLB_ADDR3, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 121 | #define bfin_read_ICPLB_ADDR4() bfin_readPTR(ICPLB_ADDR4) |
| 122 | #define bfin_write_ICPLB_ADDR4(val) bfin_writePTR(ICPLB_ADDR4, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 123 | #define bfin_read_ICPLB_ADDR5() bfin_readPTR(ICPLB_ADDR5) |
| 124 | #define bfin_write_ICPLB_ADDR5(val) bfin_writePTR(ICPLB_ADDR5, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 125 | #define bfin_read_ICPLB_ADDR6() bfin_readPTR(ICPLB_ADDR6) |
| 126 | #define bfin_write_ICPLB_ADDR6(val) bfin_writePTR(ICPLB_ADDR6, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 127 | #define bfin_read_ICPLB_ADDR7() bfin_readPTR(ICPLB_ADDR7) |
| 128 | #define bfin_write_ICPLB_ADDR7(val) bfin_writePTR(ICPLB_ADDR7, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 129 | #define bfin_read_ICPLB_ADDR8() bfin_readPTR(ICPLB_ADDR8) |
| 130 | #define bfin_write_ICPLB_ADDR8(val) bfin_writePTR(ICPLB_ADDR8, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 131 | #define bfin_read_ICPLB_ADDR9() bfin_readPTR(ICPLB_ADDR9) |
| 132 | #define bfin_write_ICPLB_ADDR9(val) bfin_writePTR(ICPLB_ADDR9, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 133 | #define bfin_read_ICPLB_ADDR10() bfin_readPTR(ICPLB_ADDR10) |
| 134 | #define bfin_write_ICPLB_ADDR10(val) bfin_writePTR(ICPLB_ADDR10, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 135 | #define bfin_read_ICPLB_ADDR11() bfin_readPTR(ICPLB_ADDR11) |
| 136 | #define bfin_write_ICPLB_ADDR11(val) bfin_writePTR(ICPLB_ADDR11, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 137 | #define bfin_read_ICPLB_ADDR12() bfin_readPTR(ICPLB_ADDR12) |
| 138 | #define bfin_write_ICPLB_ADDR12(val) bfin_writePTR(ICPLB_ADDR12, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 139 | #define bfin_read_ICPLB_ADDR13() bfin_readPTR(ICPLB_ADDR13) |
| 140 | #define bfin_write_ICPLB_ADDR13(val) bfin_writePTR(ICPLB_ADDR13, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 141 | #define bfin_read_ICPLB_ADDR14() bfin_readPTR(ICPLB_ADDR14) |
| 142 | #define bfin_write_ICPLB_ADDR14(val) bfin_writePTR(ICPLB_ADDR14, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 143 | #define bfin_read_ICPLB_ADDR15() bfin_readPTR(ICPLB_ADDR15) |
| 144 | #define bfin_write_ICPLB_ADDR15(val) bfin_writePTR(ICPLB_ADDR15, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 145 | #define bfin_read_ICPLB_DATA0() bfin_read32(ICPLB_DATA0) |
| 146 | #define bfin_write_ICPLB_DATA0(val) bfin_write32(ICPLB_DATA0, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 147 | #define bfin_read_ICPLB_DATA1() bfin_read32(ICPLB_DATA1) |
| 148 | #define bfin_write_ICPLB_DATA1(val) bfin_write32(ICPLB_DATA1, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 149 | #define bfin_read_ICPLB_DATA2() bfin_read32(ICPLB_DATA2) |
| 150 | #define bfin_write_ICPLB_DATA2(val) bfin_write32(ICPLB_DATA2, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 151 | #define bfin_read_ICPLB_DATA3() bfin_read32(ICPLB_DATA3) |
| 152 | #define bfin_write_ICPLB_DATA3(val) bfin_write32(ICPLB_DATA3, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 153 | #define bfin_read_ICPLB_DATA4() bfin_read32(ICPLB_DATA4) |
| 154 | #define bfin_write_ICPLB_DATA4(val) bfin_write32(ICPLB_DATA4, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 155 | #define bfin_read_ICPLB_DATA5() bfin_read32(ICPLB_DATA5) |
| 156 | #define bfin_write_ICPLB_DATA5(val) bfin_write32(ICPLB_DATA5, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 157 | #define bfin_read_ICPLB_DATA6() bfin_read32(ICPLB_DATA6) |
| 158 | #define bfin_write_ICPLB_DATA6(val) bfin_write32(ICPLB_DATA6, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 159 | #define bfin_read_ICPLB_DATA7() bfin_read32(ICPLB_DATA7) |
| 160 | #define bfin_write_ICPLB_DATA7(val) bfin_write32(ICPLB_DATA7, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 161 | #define bfin_read_ICPLB_DATA8() bfin_read32(ICPLB_DATA8) |
| 162 | #define bfin_write_ICPLB_DATA8(val) bfin_write32(ICPLB_DATA8, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 163 | #define bfin_read_ICPLB_DATA9() bfin_read32(ICPLB_DATA9) |
| 164 | #define bfin_write_ICPLB_DATA9(val) bfin_write32(ICPLB_DATA9, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 165 | #define bfin_read_ICPLB_DATA10() bfin_read32(ICPLB_DATA10) |
| 166 | #define bfin_write_ICPLB_DATA10(val) bfin_write32(ICPLB_DATA10, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 167 | #define bfin_read_ICPLB_DATA11() bfin_read32(ICPLB_DATA11) |
| 168 | #define bfin_write_ICPLB_DATA11(val) bfin_write32(ICPLB_DATA11, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 169 | #define bfin_read_ICPLB_DATA12() bfin_read32(ICPLB_DATA12) |
| 170 | #define bfin_write_ICPLB_DATA12(val) bfin_write32(ICPLB_DATA12, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 171 | #define bfin_read_ICPLB_DATA13() bfin_read32(ICPLB_DATA13) |
| 172 | #define bfin_write_ICPLB_DATA13(val) bfin_write32(ICPLB_DATA13, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 173 | #define bfin_read_ICPLB_DATA14() bfin_read32(ICPLB_DATA14) |
| 174 | #define bfin_write_ICPLB_DATA14(val) bfin_write32(ICPLB_DATA14, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 175 | #define bfin_read_ICPLB_DATA15() bfin_read32(ICPLB_DATA15) |
| 176 | #define bfin_write_ICPLB_DATA15(val) bfin_write32(ICPLB_DATA15, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 177 | #define bfin_read_ITEST_COMMAND() bfin_read32(ITEST_COMMAND) |
| 178 | #define bfin_write_ITEST_COMMAND(val) bfin_write32(ITEST_COMMAND, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 179 | #define bfin_read_ITEST_DATA0() bfin_read32(ITEST_DATA0) |
| 180 | #define bfin_write_ITEST_DATA0(val) bfin_write32(ITEST_DATA0, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 181 | #define bfin_read_ITEST_DATA1() bfin_read32(ITEST_DATA1) |
| 182 | #define bfin_write_ITEST_DATA1(val) bfin_write32(ITEST_DATA1, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 183 | #define bfin_read_EVT0() bfin_readPTR(EVT0) |
| 184 | #define bfin_write_EVT0(val) bfin_writePTR(EVT0, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 185 | #define bfin_read_EVT1() bfin_readPTR(EVT1) |
| 186 | #define bfin_write_EVT1(val) bfin_writePTR(EVT1, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 187 | #define bfin_read_EVT2() bfin_readPTR(EVT2) |
| 188 | #define bfin_write_EVT2(val) bfin_writePTR(EVT2, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 189 | #define bfin_read_EVT3() bfin_readPTR(EVT3) |
| 190 | #define bfin_write_EVT3(val) bfin_writePTR(EVT3, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 191 | #define bfin_read_EVT4() bfin_readPTR(EVT4) |
| 192 | #define bfin_write_EVT4(val) bfin_writePTR(EVT4, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 193 | #define bfin_read_EVT5() bfin_readPTR(EVT5) |
| 194 | #define bfin_write_EVT5(val) bfin_writePTR(EVT5, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 195 | #define bfin_read_EVT6() bfin_readPTR(EVT6) |
| 196 | #define bfin_write_EVT6(val) bfin_writePTR(EVT6, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 197 | #define bfin_read_EVT7() bfin_readPTR(EVT7) |
| 198 | #define bfin_write_EVT7(val) bfin_writePTR(EVT7, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 199 | #define bfin_read_EVT8() bfin_readPTR(EVT8) |
| 200 | #define bfin_write_EVT8(val) bfin_writePTR(EVT8, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 201 | #define bfin_read_EVT9() bfin_readPTR(EVT9) |
| 202 | #define bfin_write_EVT9(val) bfin_writePTR(EVT9, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 203 | #define bfin_read_EVT10() bfin_readPTR(EVT10) |
| 204 | #define bfin_write_EVT10(val) bfin_writePTR(EVT10, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 205 | #define bfin_read_EVT11() bfin_readPTR(EVT11) |
| 206 | #define bfin_write_EVT11(val) bfin_writePTR(EVT11, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 207 | #define bfin_read_EVT12() bfin_readPTR(EVT12) |
| 208 | #define bfin_write_EVT12(val) bfin_writePTR(EVT12, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 209 | #define bfin_read_EVT13() bfin_readPTR(EVT13) |
| 210 | #define bfin_write_EVT13(val) bfin_writePTR(EVT13, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 211 | #define bfin_read_EVT14() bfin_readPTR(EVT14) |
| 212 | #define bfin_write_EVT14(val) bfin_writePTR(EVT14, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 213 | #define bfin_read_EVT15() bfin_readPTR(EVT15) |
| 214 | #define bfin_write_EVT15(val) bfin_writePTR(EVT15, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 215 | #define bfin_read_ILAT() bfin_read32(ILAT) |
| 216 | #define bfin_write_ILAT(val) bfin_write32(ILAT, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 217 | #define bfin_read_IMASK() bfin_read32(IMASK) |
| 218 | #define bfin_write_IMASK(val) bfin_write32(IMASK, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 219 | #define bfin_read_IPEND() bfin_read32(IPEND) |
| 220 | #define bfin_write_IPEND(val) bfin_write32(IPEND, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 221 | #define bfin_read_IPRIO() bfin_read32(IPRIO) |
| 222 | #define bfin_write_IPRIO(val) bfin_write32(IPRIO, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 223 | #define bfin_read_TCNTL() bfin_read32(TCNTL) |
| 224 | #define bfin_write_TCNTL(val) bfin_write32(TCNTL, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 225 | #define bfin_read_TPERIOD() bfin_read32(TPERIOD) |
| 226 | #define bfin_write_TPERIOD(val) bfin_write32(TPERIOD, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 227 | #define bfin_read_TSCALE() bfin_read32(TSCALE) |
| 228 | #define bfin_write_TSCALE(val) bfin_write32(TSCALE, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 229 | #define bfin_read_TCOUNT() bfin_read32(TCOUNT) |
| 230 | #define bfin_write_TCOUNT(val) bfin_write32(TCOUNT, val) |
Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 231 | |
| 232 | #endif /* __BFIN_CDEF_ADSP_BF523_proc__ */ |