Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 09842c5604a07a6500e9e6753145476efb1a7695 / . / cpu / mcf523x / start.S
blob: ad04c0984a8fdacbd6ad331731732d646b66a6f5 [file] [log] [blame]
TsiChungLiewb859ef12007-08-16 19:23:50 -0500[diff] [blame]1/*
2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <config.h>
25#include "version.h"
26
27#ifndef CONFIG_IDENT_STRING
28#define CONFIG_IDENT_STRING ""
29#endif
30
31#define _START _start
32#define _FAULT _fault
33
34#define SAVE_ALL \
35 move.w #0x2700,%sr; /* disable intrs */ \
36 subl #60,%sp; /* space for 15 regs */ \
37 moveml %d0-%d7/%a0-%a6,%sp@;
38
39#define RESTORE_ALL \
40 moveml %sp@,%d0-%d7/%a0-%a6; \
41 addl #60,%sp; /* space for 15 regs */ \
42 rte;
43
44.text
45/*
46 * Vector table. This is used for initial platform startup.
47 * These vectors are to catch any un-intended traps.
48 */
49_vectors:
50
51INITSP: .long 0x00000000 /* Initial SP */
52INITPC: .long _START /* Initial PC */
53vector02: .long _FAULT /* Access Error */
54vector03: .long _FAULT /* Address Error */
55vector04: .long _FAULT /* Illegal Instruction */
56vector05: .long _FAULT /* Reserved */
57vector06: .long _FAULT /* Reserved */
58vector07: .long _FAULT /* Reserved */
59vector08: .long _FAULT /* Privilege Violation */
60vector09: .long _FAULT /* Trace */
61vector0A: .long _FAULT /* Unimplemented A-Line */
62vector0B: .long _FAULT /* Unimplemented F-Line */
63vector0C: .long _FAULT /* Debug Interrupt */
64vector0D: .long _FAULT /* Reserved */
65vector0E: .long _FAULT /* Format Error */
66vector0F: .long _FAULT /* Unitialized Int. */
67
68/* Reserved */
69vector10_17:
70.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71
72vector18: .long _FAULT /* Spurious Interrupt */
73vector19: .long _FAULT /* Autovector Level 1 */
74vector1A: .long _FAULT /* Autovector Level 2 */
75vector1B: .long _FAULT /* Autovector Level 3 */
76vector1C: .long _FAULT /* Autovector Level 4 */
77vector1D: .long _FAULT /* Autovector Level 5 */
78vector1E: .long _FAULT /* Autovector Level 6 */
79vector1F: .long _FAULT /* Autovector Level 7 */
80
81/* TRAP #0 - #15 */
82vector20_2F:
83.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85
86/* Reserved */
87vector30_3F:
88.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90
91vector64_127:
92.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100
101vector128_191:
102.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
103.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
104.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
105.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
106.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110
111vector192_255:
112.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
113.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
114.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
115.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
116.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
117.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
118.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
119.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
120
121 .text
122
123 .globl _start
124_start:
125 nop
126 nop
127 move.w #0x2700,%sr /* Mask off Interrupt */
128
129 /* Set vector base register at the beginning of the Flash */
130 move.l #CFG_FLASH_BASE, %d0
131 movec %d0, %VBR
132
133 move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
134 movec %d0, %RAMBAR1
135
136 /* invalidate and disable cache */
137 move.l #0x01000000, %d0 /* Invalidate cache cmd */
138 movec %d0, %CACR /* Invalidate cache */
139 nop
140 move.l #0, %d0
141 movec %d0, %ACR0
142 movec %d0, %ACR1
143
144 /* initialize general use internal ram */
145 move.l #0, %d0
146 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
147 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a2
148 move.l %d0, (%a1)
149 move.l %d0, (%a2)
150
151 /* set stackpointer to end of internal ram to get some stackspace for the
152 first c-code */
153 move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
154 clr.l %sp@-
155
156 move.l #__got_start, %a5 /* put relocation table address to a5 */
157
158 bsr cpu_init_f /* run low-level CPU init code (from flash) */
159 bsr board_init_f /* run low-level board init code (from flash) */
160
161 /* board_init_f() does not return */
162
163/*------------------------------------------------------------------------------*/
164
165/*
166 * void relocate_code (addr_sp, gd, addr_moni)
167 *
168 * This "function" does not return, instead it continues in RAM
169 * after relocating the monitor code.
170 *
171 * r3 = dest
172 * r4 = src
173 * r5 = length in bytes
174 * r6 = cachelinesize
175 */
176 .globl relocate_code
177relocate_code:
178 link.w %a6,#0
179 move.l 8(%a6), %sp /* set new stack pointer */
180
181 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
182 move.l 16(%a6), %a0 /* Save copy of Destination Address */
183
184 move.l #CFG_MONITOR_BASE, %a1
185 move.l #__init_end, %a2
186 move.l %a0, %a3
187
188 /* copy the code to RAM */
1891:
190 move.l (%a1)+, (%a3)+
191 cmp.l %a1,%a2
192 bgt.s 1b
193
194/*
195 * We are done. Do not return, instead branch to second part of board
196 * initialization, now running from RAM.
197 */
198 move.l %a0, %a1
199 add.l #(in_ram - CFG_MONITOR_BASE), %a1
200 jmp (%a1)
201
202in_ram:
203
204clear_bss:
205 /*
206 * Now clear BSS segment
207 */
208 move.l %a0, %a1
209 add.l #(_sbss - CFG_MONITOR_BASE),%a1
210 move.l %a0, %d1
211 add.l #(_ebss - CFG_MONITOR_BASE),%d1
2126:
213 clr.l (%a1)+
214 cmp.l %a1,%d1
215 bgt.s 6b
216
217 /*
218 * fix got table in RAM
219 */
220 move.l %a0, %a1
221 add.l #(__got_start - CFG_MONITOR_BASE),%a1
222 move.l %a1,%a5 /* * fix got pointer register a5 */
223
224 move.l %a0, %a2
225 add.l #(__got_end - CFG_MONITOR_BASE),%a2
226
2277:
228 move.l (%a1),%d1
229 sub.l #_start,%d1
230 add.l %a0,%d1
231 move.l %d1,(%a1)+
232 cmp.l %a2, %a1
233 bne 7b
234
235 /* calculate relative jump to board_init_r in ram */
236 move.l %a0, %a1
237 add.l #(board_init_r - CFG_MONITOR_BASE), %a1
238
239 /* set parameters for board_init_r */
240 move.l %a0,-(%sp) /* dest_addr */
241 move.l %d0,-(%sp) /* gd */
242 jsr (%a1)
243
244/*------------------------------------------------------------------------------*/
245/* exception code */
246 .globl _fault
247_fault:
248 jmp _fault
249 .globl _exc_handler
250
251_exc_handler:
252 SAVE_ALL
253 movel %sp,%sp@-
254 bsr exc_handler
255 addql #4,%sp
256 RESTORE_ALL
257
258 .globl _int_handler
259_int_handler:
260 SAVE_ALL
261 movel %sp,%sp@-
262 bsr int_handler
263 addql #4,%sp
264 RESTORE_ALL
265
266/*------------------------------------------------------------------------------*/
267/* cache functions */
268 .globl icache_enable
269icache_enable:
270 move.l #0x01000000, %d0 /* Invalidate cache cmd */
271 movec %d0, %CACR /* Invalidate cache */
272 nop
273 move.l #(CFG_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
274 movec %d0, %ACR0 /* Enable cache */
275 move.l #(CFG_FLASH_BASE + 0xc000), %d0 /* Setup cache mask */
276 movec %d0, %ACR1 /* Enable cache */
277
278 move.l #0x80400100, %d0 /* Setup cache mask */
279 movec %d0, %CACR /* Enable cache */
280 nop
281
282 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
283 moveq #1, %d0
284 move.l %d0, (%a1)
285 rts
286
287 .globl icache_disable
288icache_disable:
289 move.l #0x00000100, %d0 /* Setup cache mask */
290 movec %d0, %CACR /* Disable cache */
291 clr.l %d0 /* Setup cache mask */
292 movec %d0, %ACR0
293 movec %d0, %ACR1
294
295 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
296 moveq #0, %d0
297 move.l %d0, (%a1)
298 rts
299
300 .globl icache_status
301icache_status:
302 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
303 move.l (%a1), %d0
304 rts
305
306 .globl icache_invalid
307icache_invalid:
308 move.l #0x80600100, %d0 /* Setup cache mask */
309 movec %d0, %CACR /* Enable cache */
310 nop
311 rts
312
313 .globl dcache_enable
314dcache_enable:
315 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
316 moveq #1, %d0
317 move.l %d0, (%a1)
318 rts
319
320 /* No dcache, just a dummy function */
321 .globl dcache_disable
322dcache_disable:
323 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
324 moveq #0, %d0
325 move.l %d0, (%a1)
326 rts
327
328 .globl dcache_status
329dcache_status:
330 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
331 move.l (%a1), %d0
332 rts
333
334/*------------------------------------------------------------------------------*/
335
336 .globl version_string
337version_string:
338 .ascii U_BOOT_VERSION
339 .ascii " (", __DATE__, " - ", __TIME__, ")"
340 .ascii CONFIG_IDENT_STRING, "\0"
TsiChung Liew9d636e92008-03-28 08:47:45 -0500[diff] [blame]341 .align 4