blob: 883d689ed06303398711e29533a612c9151e5b94 [file] [log] [blame]
wdenka21ad7b2005-05-19 22:39:42 +00001/*
2 * (C) Copyright 2004-2005, Greg Ungerer <greg.ungerer@opengear.com>
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#include <common.h>
24#include <asm/arch/platform.h>
25
26/*
27 * Handy KS8695 register access functions.
28 */
29#define ks8695_read(a) *((volatile ulong *) (KS8695_IO_BASE + (a)))
30#define ks8695_write(a,v) *((volatile ulong *) (KS8695_IO_BASE + (a))) = (v)
31
32int timer_inited;
33ulong timer_ticks;
34
35int interrupt_init (void)
36{
37 /* nothing happens here - we don't setup any IRQs */
38 return (0);
39}
40
41/*
42 * Initial timer set constants. Nothing complicated, just set for a 1ms
43 * tick.
44 */
45#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_1)
46#define TIMER_COUNT (TIMER_INTERVAL / 2)
47#define TIMER_PULSE TIMER_COUNT
48
49void reset_timer_masked(void)
50{
51 /* Set the hadware timer for 1ms */
52 ks8695_write(KS8695_TIMER1, TIMER_COUNT);
53 ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
54 ks8695_write(KS8695_TIMER_CTRL, 0x2);
55 timer_ticks = 0;
56 timer_inited++;
57}
58
59void reset_timer(void)
60{
61 reset_timer_masked();
62}
63
64ulong get_timer_masked(void)
65{
66 /* Check for timer wrap */
67 if (ks8695_read(KS8695_INT_STATUS) & KS8695_INTMASK_TIMERINT1) {
68 /* Clear interrupt condition */
69 ks8695_write(KS8695_INT_STATUS, KS8695_INTMASK_TIMERINT1);
70 timer_ticks++;
71 }
72 return timer_ticks;
73}
74
75ulong get_timer(ulong base)
76{
77 return (get_timer_masked() - base);
78}
79
80void set_timer(ulong t)
81{
82 timer_ticks = t;
83}
84
85void udelay(ulong usec)
86{
87 ulong start = get_timer_masked();
88 ulong end;
89
90 if (!timer_inited)
91 reset_timer();
92
93 /* Only 1ms resolution :-( */
94 end = usec / 1000;
95 while (get_timer(start) < end)
96 ;
97}
98
99void reset_cpu (ulong ignored)
100{
101 ulong tc;
102
103 /* Set timer0 to watchdog, and let it timeout */
104 tc = ks8695_read(KS8695_TIMER_CTRL) & 0x2;
105 ks8695_write(KS8695_TIMER_CTRL, tc);
106 ks8695_write(KS8695_TIMER0, ((10 << 8) | 0xff));
107 ks8695_write(KS8695_TIMER_CTRL, (tc | 0x1));
108
109 /* Should only wait here till watchdog resets */
110 for (;;)
111 ;
112}