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Wenyou Yang8c772bd2016-07-20 17:55:12 +08001config CLK_AT91
2 bool "AT91 clock drivers"
3 depends on CLK
Wenyou Yang9a71d392016-09-27 11:00:29 +08004 select MISC
Wenyou Yang8c772bd2016-07-20 17:55:12 +08005 help
6 This option is used to enable the AT91 clock driver.
7 The driver supports the AT91 clock generator, including
8 the oscillators and PLLs, such as main clock, slow clock,
9 PLLA, UTMI PLL. Clocks can also be a source clock of other
10 clocks a tree structure, such as master clock, usb device
11 clock, matrix clock and generic clock.
12 Devices can use a common clock API to request a particular
13 clock, enable it and get its rate.
14
15config AT91_UTMI
16 bool "Support UTMI PLL Clock"
17 depends on CLK_AT91
18 help
19 This option is used to enable the AT91 UTMI PLL clock
20 driver. It is the clock provider of USB, and UPLLCK is the
21 output of 480 MHz UTMI PLL, The souce clock of the UTMI
22 PLL is the main clock, so the main clock must select the
23 fast crystal oscillator to meet the frequency accuracy
24 required by USB.
25
26config AT91_H32MX
27 bool "Support H32MX 32-bit Matrix Clock"
28 depends on CLK_AT91
29 help
30 This option is used to enable the AT91 H32MX matrixes
31 clock driver. There are H64MX and H32MX matrixes clocks,
32 H64MX 64-bit matrix clocks are MCK. The H32MX 32-bit
33 matrix clock is to be configured as MCK if MCK does not
34 exceed 83 MHz, else it is to be configured as MCK/2.
35
36config AT91_GENERIC_CLK
37 bool "Support Generic Clock"
38 depends on CLK_AT91
39 help
40 This option is used to enable the AT91 generic clock
41 driver. Some peripherals may need a second clock source
42 that may be different from the system clock. This second
43 clock is the generic clock (GCLK) and is managed by
44 the PMC via PMC_PCR register.