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Stefano Babic1f76ac12011-11-30 23:56:52 +00001/*
2 * Copyright (C) 2011
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
5 * Copyright (C) 2009 TechNexion Ltd.
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Stefano Babic1f76ac12011-11-30 23:56:52 +00008 */
9
10#ifndef __TAM3517_H
11#define __TAM3517_H
12
13/*
14 * High Level Configuration Options
15 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000016
17#define CONFIG_SYS_TEXT_BASE 0x80008000
18
Stefano Babic1f76ac12011-11-30 23:56:52 +000019#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
20
21#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050022#include <asm/arch/omap.h>
Stefano Babic1f76ac12011-11-30 23:56:52 +000023
Stefano Babic1f76ac12011-11-30 23:56:52 +000024/* Clock Defines */
25#define V_OSCK 26000000 /* Clock output from T2 */
26#define V_SCLK (V_OSCK >> 1)
27
Stefano Babic1f76ac12011-11-30 23:56:52 +000028#define CONFIG_MISC_INIT_R
29
30#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
31#define CONFIG_SETUP_MEMORY_TAGS
32#define CONFIG_INITRD_TAG
33#define CONFIG_REVISION_TAG
34
35/*
36 * Size of malloc() pool
37 */
38#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
39#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
40 2 * 1024 * 1024)
41/*
42 * DDR related
43 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000044#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
45
46/*
47 * Hardware drivers
48 */
49
50/*
51 * NS16550 Configuration
52 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000053#define CONFIG_SYS_NS16550_SERIAL
54#define CONFIG_SYS_NS16550_REG_SIZE (-4)
55#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
56
57/*
58 * select serial console configuration
59 */
60#define CONFIG_CONS_INDEX 1
61#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
62#define CONFIG_SERIAL1 /* UART1 */
63
64/* allow to overwrite serial and ethaddr */
65#define CONFIG_ENV_OVERWRITE
Stefano Babic1f76ac12011-11-30 23:56:52 +000066#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
67 115200}
Stefano Babic1f76ac12011-11-30 23:56:52 +000068/* EHCI */
Stefano Babic1f76ac12011-11-30 23:56:52 +000069#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
70#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
Stefano Babic1f76ac12011-11-30 23:56:52 +000071
Stefano Babic1f76ac12011-11-30 23:56:52 +000072/* commands to include */
Stefano Babic1f76ac12011-11-30 23:56:52 +000073#define CONFIG_CMD_NAND /* NAND support */
Stefano Babicf39fd592012-08-29 01:21:59 +000074#define CONFIG_CMD_EEPROM
Stefano Babic1f76ac12011-11-30 23:56:52 +000075
Heiko Schocherf53f2b82013-10-22 11:03:18 +020076#define CONFIG_SYS_I2C
77#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
78#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
79#define CONFIG_SYS_I2C_OMAP34XX
Stefano Babicf39fd592012-08-29 01:21:59 +000080#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
81#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
82#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
Stefano Babic1f76ac12011-11-30 23:56:52 +000083
84/*
85 * Board NAND Info.
86 */
87#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
88 /* to access */
89 /* nand at CS0 */
90
91#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
92 /* NAND devices */
Stefano Babic1f76ac12011-11-30 23:56:52 +000093
94#define CONFIG_AUTO_COMPLETE
95
96/*
97 * Miscellaneous configurable options
98 */
99#define CONFIG_SYS_LONGHELP /* undef to save memory */
Stefano Babic1f76ac12011-11-30 23:56:52 +0000100#define CONFIG_CMDLINE_EDITING
101#define CONFIG_AUTO_COMPLETE
102#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
103
104/* Print Buffer Size */
105#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
106 sizeof(CONFIG_SYS_PROMPT) + 16)
107#define CONFIG_SYS_MAXARGS 32 /* max number of command */
108 /* args */
109/* Boot Argument Buffer Size */
110#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
111/* memtest works on */
112#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
113#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
114 0x01F00000) /* 31MB */
115
116#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
117 /* address */
118
119/*
120 * AM3517 has 12 GP timers, they can be driven by the system clock
121 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
122 * This rate is divided by a local divisor.
123 */
124#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
125#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Stefano Babic1f76ac12011-11-30 23:56:52 +0000126
127/*
Stefano Babic1f76ac12011-11-30 23:56:52 +0000128 * Physical Memory Map
129 */
130#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
131#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Stefano Babic1f76ac12011-11-30 23:56:52 +0000132#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
133
134/*
135 * FLASH and environment organization
136 */
137
138/* **** PISMO SUPPORT *** */
Jeroen Hofsteea22b9a52014-05-31 17:08:30 +0200139#define CONFIG_NAND
Stefano Babic1f76ac12011-11-30 23:56:52 +0000140#define CONFIG_NAND_OMAP_GPMC
Stefano Babic1f76ac12011-11-30 23:56:52 +0000141#define CONFIG_ENV_IS_IN_NAND
142#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
143
144/* Redundant Environment */
145#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
146#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
147#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
148#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
149 2 * CONFIG_SYS_ENV_SECT_SIZE)
150#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
151
152#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
153#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
154#define CONFIG_SYS_INIT_RAM_SIZE 0x800
155#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
156 CONFIG_SYS_INIT_RAM_SIZE - \
157 GENERATED_GBL_DATA_SIZE)
158
159/*
160 * ethernet support, EMAC
161 *
162 */
163#define CONFIG_DRIVER_TI_EMAC
164#define CONFIG_DRIVER_TI_EMAC_USE_RMII
165#define CONFIG_MII
Stefano Babic1f76ac12011-11-30 23:56:52 +0000166#define CONFIG_BOOTP_DNS
167#define CONFIG_BOOTP_DNS2
168#define CONFIG_BOOTP_SEND_HOSTNAME
169#define CONFIG_NET_RETRY_COUNT 10
Stefano Babic1f76ac12011-11-30 23:56:52 +0000170
171/* Defines for SPL */
Tom Rini28591df2012-08-13 12:03:19 -0700172#define CONFIG_SPL_FRAMEWORK
Tom Rini9e0c2602012-08-14 12:26:08 -0700173#define CONFIG_SPL_BOARD_INIT
Stefano Babic1f76ac12011-11-30 23:56:52 +0000174#define CONFIG_SPL_CONSOLE
175#define CONFIG_SPL_NAND_SIMPLE
Jeroen Hofstee64407af2013-12-21 18:03:09 +0100176#define CONFIG_SPL_NAND_SOFTECC
Stefano Babic1f76ac12011-11-30 23:56:52 +0000177#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
178
Scott Woodc352a0c2012-09-20 19:09:07 -0500179#define CONFIG_SPL_NAND_BASE
180#define CONFIG_SPL_NAND_DRIVERS
181#define CONFIG_SPL_NAND_ECC
Tom Rini28eec372016-11-07 21:34:54 -0500182#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
Stefano Babic1f76ac12011-11-30 23:56:52 +0000183
184#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
Tom Rinicfff4aa2016-08-26 13:30:43 -0400185#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
186 CONFIG_SPL_TEXT_BASE)
Stefano Babice0faf3c2016-06-14 09:13:37 +0200187#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
Stefano Babic1f76ac12011-11-30 23:56:52 +0000188
189#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
190#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
191#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
192#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
193
Stefano Babice0faf3c2016-06-14 09:13:37 +0200194#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
195#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
196
197/* FAT */
198#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
199#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
200
201/* RAW SD card / eMMC */
202#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
203#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
204#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
205
Stefano Babic1f76ac12011-11-30 23:56:52 +0000206/* NAND boot config */
Stefano Babic0cd41182015-07-26 15:18:15 +0200207#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
Stefano Babic1f76ac12011-11-30 23:56:52 +0000208#define CONFIG_SYS_NAND_PAGE_COUNT 64
209#define CONFIG_SYS_NAND_PAGE_SIZE 2048
210#define CONFIG_SYS_NAND_OOBSIZE 64
211#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
212#define CONFIG_SYS_NAND_5_ADDR_CYCLE
213#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
214#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
215 48, 49, 50, 51, 52, 53, 54, 55,\
216 56, 57, 58, 59, 60, 61, 62, 63}
217#define CONFIG_SYS_NAND_ECCSIZE 256
218#define CONFIG_SYS_NAND_ECCBYTES 3
pekon gupta3ef49732013-11-18 19:03:01 +0530219#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
Jeroen Hofstee6bd1ecf2015-05-30 10:11:25 +0200220#define CONFIG_NAND_OMAP_GPMC_PREFETCH
Stefano Babic1f76ac12011-11-30 23:56:52 +0000221
Stefano Babic1f76ac12011-11-30 23:56:52 +0000222#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
223
224#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
225#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
226
Stefano Babic1f76ac12011-11-30 23:56:52 +0000227#define CONFIG_CMD_UBIFS
228#define CONFIG_RBTREE
229#define CONFIG_LZO
230#define CONFIG_MTD_PARTITIONS
231#define CONFIG_MTD_DEVICE
232#define CONFIG_CMD_MTDPARTS
233
234/* Setup MTD for NAND on the SOM */
235#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
236#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
Stefano Babic18db74a2012-02-07 23:29:34 +0000237 "1m(u-boot),256k(env1)," \
238 "256k(env2),6m(kernel),-(rootfs)"
Stefano Babic1f76ac12011-11-30 23:56:52 +0000239
Stefano Babic1f76ac12011-11-30 23:56:52 +0000240#define CONFIG_TAM3517_SETTINGS \
241 "netdev=eth0\0" \
242 "nandargs=setenv bootargs root=${nandroot} " \
243 "rootfstype=${nandrootfstype}\0" \
244 "nfsargs=setenv bootargs root=/dev/nfs rw " \
245 "nfsroot=${serverip}:${rootpath}\0" \
246 "ramargs=setenv bootargs root=/dev/ram rw\0" \
247 "addip_sta=setenv bootargs ${bootargs} " \
248 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
249 ":${hostname}:${netdev}:off panic=1\0" \
250 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
251 "addip=if test -n ${ipdyn};then run addip_dyn;" \
252 "else run addip_sta;fi\0" \
253 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
254 "addtty=setenv bootargs ${bootargs}" \
255 " console=ttyO0,${baudrate}\0" \
256 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
257 "loadaddr=82000000\0" \
258 "kernel_addr_r=82000000\0" \
Marek Vasutfd5ba892012-09-23 17:41:23 +0200259 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
260 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
Stefano Babic1f76ac12011-11-30 23:56:52 +0000261 "flash_self=run ramargs addip addtty addmtd addmisc;" \
262 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
263 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
264 "bootm ${kernel_addr}\0" \
265 "nandboot=run nandargs addip addtty addmtd addmisc;" \
266 "nand read ${kernel_addr_r} kernel\0" \
267 "bootm ${kernel_addr_r}\0" \
268 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
269 "run nfsargs addip addtty addmtd addmisc;" \
270 "bootm ${kernel_addr_r}\0" \
271 "net_self=if run net_self_load;then " \
272 "run ramargs addip addtty addmtd addmisc;" \
273 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
274 "else echo Images not loades;fi\0" \
Marek Vasutfd5ba892012-09-23 17:41:23 +0200275 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
Stefano Babic1f76ac12011-11-30 23:56:52 +0000276 "load=tftp ${loadaddr} ${u-boot}\0" \
277 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
Marek Vasutfd5ba892012-09-23 17:41:23 +0200278 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
Stefano Babic1f76ac12011-11-30 23:56:52 +0000279 "uboot_addr=0x80000\0" \
280 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
281 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
282 "updatemlo=nandecc hw;nand erase 0 20000;" \
283 "nand write ${loadaddr} 0 20000\0" \
284 "upd=if run load;then echo Updating u-boot;if run update;" \
285 "then echo U-Boot updated;" \
286 "else echo Error updating u-boot !;" \
287 "echo Board without bootloader !!;" \
288 "fi;" \
289 "else echo U-Boot not downloaded..exiting;fi\0" \
290
Stefano Babicf39fd592012-08-29 01:21:59 +0000291/*
292 * this is common code for all TAM3517 boards.
293 * MAC address is stored from manufacturer in
294 * I2C EEPROM
295 */
296#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
Stefano Babicf39fd592012-08-29 01:21:59 +0000297/*
298 * The I2C EEPROM on the TAM3517 contains
299 * mac address and production data
300 */
301struct tam3517_module_info {
302 char customer[48];
303 char product[48];
304
305 /*
306 * bit 0~47 : sequence number
307 * bit 48~55 : week of year, from 0.
308 * bit 56~63 : year
309 */
310 unsigned long long sequence_number;
311
312 /*
313 * bit 0~7 : revision fixed
314 * bit 8~15 : revision major
315 * bit 16~31 : TNxxx
316 */
317 unsigned int revision;
318 unsigned char eth_addr[4][8];
319 unsigned char _rev[100];
320};
321
Stefano Babic0a152e62012-11-23 05:19:25 +0000322#define TAM3517_READ_EEPROM(info, ret) \
323do { \
Heiko Schocherf53f2b82013-10-22 11:03:18 +0200324 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
Stefano Babicf39fd592012-08-29 01:21:59 +0000325 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
Stefano Babic0a152e62012-11-23 05:19:25 +0000326 (void *)info, sizeof(*info))) \
327 ret = 1; \
328 else \
329 ret = 0; \
330} while (0)
331
332#define TAM3517_READ_MAC_FROM_EEPROM(info) \
333do { \
334 char buf[80], ethname[20]; \
335 int i; \
Stefano Babicf39fd592012-08-29 01:21:59 +0000336 memset(buf, 0, sizeof(buf)); \
Stefano Babic0a152e62012-11-23 05:19:25 +0000337 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
Stefano Babicf39fd592012-08-29 01:21:59 +0000338 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
Stefano Babic0a152e62012-11-23 05:19:25 +0000339 (info)->eth_addr[i][5], \
340 (info)->eth_addr[i][4], \
341 (info)->eth_addr[i][3], \
342 (info)->eth_addr[i][2], \
343 (info)->eth_addr[i][1], \
344 (info)->eth_addr[i][0]); \
Stefano Babicf39fd592012-08-29 01:21:59 +0000345 \
346 if (i) \
347 sprintf(ethname, "eth%daddr", i); \
348 else \
Ben Whitten34fd6c92015-12-30 13:05:58 +0000349 strcpy(ethname, "ethaddr"); \
Stefano Babicf39fd592012-08-29 01:21:59 +0000350 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
351 setenv(ethname, buf); \
352 } \
353} while (0)
Stefano Babic0a152e62012-11-23 05:19:25 +0000354
355/* The following macros are taken from Technexion's documentation */
356#define TAM3517_sequence_number(info) \
357 ((info)->sequence_number % 0x1000000000000LL)
358#define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
359#define TAM3517_year(info) ((info)->sequence_number >> 56)
360#define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
361#define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
362#define TAM3517_revision_tn(info) ((info)->revision >> 16)
363
364#define TAM3517_PRINT_SOM_INFO(info) \
365do { \
366 printf("Vendor:%s\n", (info)->customer); \
367 printf("SOM: %s\n", (info)->product); \
368 printf("SeqNr: %02llu%02llu%012llu\n", \
369 TAM3517_year(info), \
370 TAM3517_week_of_year(info), \
371 TAM3517_sequence_number(info)); \
372 printf("Rev: TN%u %u.%u\n", \
373 TAM3517_revision_tn(info), \
374 TAM3517_revision_major(info), \
375 TAM3517_revision_fixed(info)); \
376} while (0)
377
Stefano Babicf39fd592012-08-29 01:21:59 +0000378#endif
379
Stefano Babic1f76ac12011-11-30 23:56:52 +0000380#endif /* __TAM3517_H */