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Marek Vasut163551a2010-05-11 04:31:44 +02001/*
2 * Toradex Colibri PXA270 configuration file
3 *
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
Marcel Ziswilerd92dee52016-11-16 17:49:23 +01005 * Copyright (C) 2015-2016 Marcel Ziswiler <marcel@ziswiler.com>
Marek Vasut163551a2010-05-11 04:31:44 +02006 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02007 * SPDX-License-Identifier: GPL-2.0+
Marek Vasut163551a2010-05-11 04:31:44 +02008 */
9
Marcel Ziswilere40eaca2015-03-01 00:53:15 +010010#ifndef __CONFIG_H
11#define __CONFIG_H
Marek Vasut163551a2010-05-11 04:31:44 +020012
13/*
14 * High Level Board Configuration Options
15 */
Marek Vasut85cc88a2011-11-26 07:20:07 +010016#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
Marek Vasute326a232011-11-26 07:15:36 +010017#define CONFIG_SYS_TEXT_BASE 0x0
Marcel Ziswilere40eaca2015-03-01 00:53:15 +010018/* Avoid overwriting factory configuration block */
19#define CONFIG_BOARD_SIZE_LIMIT 0x40000
Marek Vasut163551a2010-05-11 04:31:44 +020020
Marcel Ziswiler3e2cb732015-08-16 04:16:35 +020021/* We will never enable dcache because we have to setup MMU first */
22#define CONFIG_SYS_DCACHE_OFF
23
Marcel Ziswilerd92dee52016-11-16 17:49:23 +010024#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */
25
Marek Vasut163551a2010-05-11 04:31:44 +020026/*
27 * Environment settings
28 */
Marek Vasute326a232011-11-26 07:15:36 +010029#define CONFIG_ENV_OVERWRITE
Marcel Ziswilerd92dee52016-11-16 17:49:23 +010030#define CONFIG_ENV_VARS_UBOOT_CONFIG
31#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
Marek Vasute326a232011-11-26 07:15:36 +010032#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
33#define CONFIG_ARCH_CPU_INIT
Marek Vasut163551a2010-05-11 04:31:44 +020034#define CONFIG_BOOTCOMMAND \
Marcel Ziswiler92f0d502015-03-01 00:53:16 +010035 "if fatload mmc 0 0xa0000000 uImage; then " \
Marek Vasut163551a2010-05-11 04:31:44 +020036 "bootm 0xa0000000; " \
37 "fi; " \
38 "if usb reset && fatload usb 0 0xa0000000 uImage; then " \
39 "bootm 0xa0000000; " \
40 "fi; " \
Marcel Ziswiler92f0d502015-03-01 00:53:16 +010041 "bootm 0xc0000;"
Marek Vasut163551a2010-05-11 04:31:44 +020042#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
43#define CONFIG_TIMESTAMP
Marek Vasut163551a2010-05-11 04:31:44 +020044#define CONFIG_CMDLINE_TAG
45#define CONFIG_SETUP_MEMORY_TAGS
Marek Vasut163551a2010-05-11 04:31:44 +020046
47/*
48 * Serial Console Configuration
49 */
Marek Vasut163551a2010-05-11 04:31:44 +020050
51/*
52 * Bootloader Components Configuration
53 */
Marek Vasut163551a2010-05-11 04:31:44 +020054#define CONFIG_CMD_ENV
Marek Vasut163551a2010-05-11 04:31:44 +020055
Marcel Ziswiler99c53412015-08-16 04:16:36 +020056/* I2C support */
57#ifdef CONFIG_SYS_I2C
Marcel Ziswiler99c53412015-08-16 04:16:36 +020058#define CONFIG_SYS_I2C_PXA
59#define CONFIG_PXA_STD_I2C
60#define CONFIG_PXA_PWR_I2C
61#define CONFIG_SYS_I2C_SPEED 100000
62#endif
63
Marcel Ziswiler3e2cb732015-08-16 04:16:35 +020064/* LCD support */
65#ifdef CONFIG_LCD
66#define CONFIG_PXA_LCD
67#define CONFIG_PXA_VGA
Marcel Ziswiler3e2cb732015-08-16 04:16:35 +020068#define CONFIG_LCD_LOGO
69#endif
70
Marek Vasut163551a2010-05-11 04:31:44 +020071/*
72 * Networking Configuration
Marek Vasut163551a2010-05-11 04:31:44 +020073 */
74#ifdef CONFIG_CMD_NET
Marek Vasut163551a2010-05-11 04:31:44 +020075
Marek Vasut163551a2010-05-11 04:31:44 +020076#define CONFIG_DRIVER_DM9000 1
77#define CONFIG_DM9000_BASE 0x08000000
78#define DM9000_IO (CONFIG_DM9000_BASE)
79#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
80#define CONFIG_NET_RETRY_COUNT 10
81
82#define CONFIG_BOOTP_BOOTFILESIZE
83#define CONFIG_BOOTP_BOOTPATH
84#define CONFIG_BOOTP_GATEWAY
85#define CONFIG_BOOTP_HOSTNAME
86#endif
87
Marcel Ziswiler06d7f6d2015-03-01 00:53:14 +010088#undef CONFIG_SYS_LONGHELP /* Saves 10 KB */
Marek Vasute326a232011-11-26 07:15:36 +010089#define CONFIG_SYS_CBSIZE 256
90#define CONFIG_SYS_PBSIZE \
91 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
92#define CONFIG_SYS_MAXARGS 16
93#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Marek Vasut163551a2010-05-11 04:31:44 +020094#define CONFIG_SYS_DEVICE_NULLDEV 1
Marcel Ziswilerebd0e532016-11-14 21:40:27 +010095#undef CONFIG_CMDLINE_EDITING /* Saves 2.5 KB */
96#undef CONFIG_AUTO_COMPLETE /* Saves 2.5 KB */
Marek Vasute326a232011-11-26 07:15:36 +010097
Marek Vasut163551a2010-05-11 04:31:44 +020098/*
99 * Clock Configuration
100 */
Marek Vasute326a232011-11-26 07:15:36 +0100101#define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */
Marek Vasut163551a2010-05-11 04:31:44 +0200102
103/*
Marek Vasut163551a2010-05-11 04:31:44 +0200104 * DRAM Map
105 */
106#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */
107#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
108#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
109
110#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
111#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */
112
113#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
114#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
115
Marek Vasute326a232011-11-26 07:15:36 +0100116#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1
Marek Vasut62f66a52010-09-23 09:46:57 +0200117#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Marek Vasute326a232011-11-26 07:15:36 +0100118#define CONFIG_SYS_INIT_SP_ADDR 0x5c010000
Marek Vasut62f66a52010-09-23 09:46:57 +0200119
Marek Vasut163551a2010-05-11 04:31:44 +0200120/*
121 * NOR FLASH
122 */
123#ifdef CONFIG_CMD_FLASH
124#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
Marcel Ziswiler7cc27c92015-08-16 04:16:34 +0200125#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */
Marek Vasut163551a2010-05-11 04:31:44 +0200126#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
127
128#define CONFIG_SYS_FLASH_CFI
129#define CONFIG_FLASH_CFI_DRIVER 1
Marcel Ziswiler7cc27c92015-08-16 04:16:34 +0200130#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
Marek Vasut163551a2010-05-11 04:31:44 +0200131
132#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
133#define CONFIG_SYS_MAX_FLASH_BANKS 1
134
Marek Vasute326a232011-11-26 07:15:36 +0100135#define CONFIG_SYS_FLASH_ERASE_TOUT (25 * CONFIG_SYS_HZ)
136#define CONFIG_SYS_FLASH_WRITE_TOUT (25 * CONFIG_SYS_HZ)
Marcel Ziswiler7cc27c92015-08-16 04:16:34 +0200137#define CONFIG_SYS_FLASH_LOCK_TOUT (25 * CONFIG_SYS_HZ)
138#define CONFIG_SYS_FLASH_UNLOCK_TOUT (25 * CONFIG_SYS_HZ)
Marek Vasut163551a2010-05-11 04:31:44 +0200139
140#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
141#define CONFIG_SYS_FLASH_PROTECTION 1
142
143#define CONFIG_ENV_IS_IN_FLASH 1
144
145#else /* No flash */
Marcel Ziswilerf5e4b952015-03-01 00:53:12 +0100146#define CONFIG_ENV_IS_NOWHERE
Marek Vasut163551a2010-05-11 04:31:44 +0200147#endif
148
Marek Vasute326a232011-11-26 07:15:36 +0100149#define CONFIG_SYS_MONITOR_BASE 0x0
Marcel Ziswilere40eaca2015-03-01 00:53:15 +0100150#define CONFIG_SYS_MONITOR_LEN 0x40000
Marek Vasut163551a2010-05-11 04:31:44 +0200151
Marcel Ziswilere40eaca2015-03-01 00:53:15 +0100152/* Skip factory configuration block */
Marek Vasute326a232011-11-26 07:15:36 +0100153#define CONFIG_ENV_ADDR \
Marcel Ziswilere40eaca2015-03-01 00:53:15 +0100154 (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN + 0x40000)
Marek Vasute326a232011-11-26 07:15:36 +0100155#define CONFIG_ENV_SIZE 0x40000
156#define CONFIG_ENV_SECT_SIZE 0x40000
Marek Vasut163551a2010-05-11 04:31:44 +0200157
158/*
159 * GPIO settings
160 */
161#define CONFIG_SYS_GPSR0_VAL 0x00000000
162#define CONFIG_SYS_GPSR1_VAL 0x00020000
Marcel Ziswilerbe7f13c2015-03-01 00:53:19 +0100163#define CONFIG_SYS_GPSR2_VAL 0x0002c000
Marek Vasut163551a2010-05-11 04:31:44 +0200164#define CONFIG_SYS_GPSR3_VAL 0x00000000
165
166#define CONFIG_SYS_GPCR0_VAL 0x00000000
167#define CONFIG_SYS_GPCR1_VAL 0x00000000
168#define CONFIG_SYS_GPCR2_VAL 0x00000000
169#define CONFIG_SYS_GPCR3_VAL 0x00000000
170
Marcel Ziswilerbe7f13c2015-03-01 00:53:19 +0100171#define CONFIG_SYS_GPDR0_VAL 0xc8008000
172#define CONFIG_SYS_GPDR1_VAL 0xfc02a981
173#define CONFIG_SYS_GPDR2_VAL 0x92c3ffff
174#define CONFIG_SYS_GPDR3_VAL 0x0061e804
Marek Vasut163551a2010-05-11 04:31:44 +0200175
Marcel Ziswilerbe7f13c2015-03-01 00:53:19 +0100176#define CONFIG_SYS_GAFR0_L_VAL 0x80100000
177#define CONFIG_SYS_GAFR0_U_VAL 0xa5c00010
178#define CONFIG_SYS_GAFR1_L_VAL 0x6992901a
179#define CONFIG_SYS_GAFR1_U_VAL 0xaaa50008
180#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
181#define CONFIG_SYS_GAFR2_U_VAL 0x4109a002
182#define CONFIG_SYS_GAFR3_L_VAL 0x54000310
183#define CONFIG_SYS_GAFR3_U_VAL 0x00005401
Marek Vasut163551a2010-05-11 04:31:44 +0200184
185#define CONFIG_SYS_PSSR_VAL 0x30
186
187/*
188 * Clock settings
189 */
190#define CONFIG_SYS_CKEN 0x00500240
191#define CONFIG_SYS_CCCR 0x02000290
192
193/*
194 * Memory settings
195 */
Marcel Ziswilerbe7f13c2015-03-01 00:53:19 +0100196#define CONFIG_SYS_MSC0_VAL 0x9ee1c5f2
197#define CONFIG_SYS_MSC1_VAL 0x9ee1f994
198#define CONFIG_SYS_MSC2_VAL 0x9ee19ee1
199#define CONFIG_SYS_MDCNFG_VAL 0x090009c9
200#define CONFIG_SYS_MDREFR_VAL 0x2003a031
201#define CONFIG_SYS_MDMRS_VAL 0x00220022
202#define CONFIG_SYS_FLYCNFG_VAL 0x00010001
Marek Vasut163551a2010-05-11 04:31:44 +0200203#define CONFIG_SYS_SXCNFG_VAL 0x40044004
204
205/*
206 * PCMCIA and CF Interfaces
207 */
Marcel Ziswilerbe7f13c2015-03-01 00:53:19 +0100208#define CONFIG_SYS_MECR_VAL 0x00000000
209#define CONFIG_SYS_MCMEM0_VAL 0x00028307
Marek Vasut163551a2010-05-11 04:31:44 +0200210#define CONFIG_SYS_MCMEM1_VAL 0x00014307
Marcel Ziswilerbe7f13c2015-03-01 00:53:19 +0100211#define CONFIG_SYS_MCATT0_VAL 0x00038787
Marek Vasut163551a2010-05-11 04:31:44 +0200212#define CONFIG_SYS_MCATT1_VAL 0x0001c787
Marcel Ziswilerbe7f13c2015-03-01 00:53:19 +0100213#define CONFIG_SYS_MCIO0_VAL 0x0002830f
Marek Vasut163551a2010-05-11 04:31:44 +0200214#define CONFIG_SYS_MCIO1_VAL 0x0001430f
215
Marek Vasutcb4d3372011-11-26 11:27:50 +0100216#include "pxa-common.h"
Marek Vasut163551a2010-05-11 04:31:44 +0200217
Marcel Ziswilere40eaca2015-03-01 00:53:15 +0100218#endif /* __CONFIG_H */