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wdenk121cb962002-10-07 19:37:29 +00001/*
Stefan Roese88fbf932010-04-15 16:07:28 +02002 * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's
wdenk121cb962002-10-07 19:37:29 +00003 * copyright notice:
4 *
5 * General Purpose functions for the global management of the
6 * 8260 Communication Processor Module.
7 * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
8 * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
9 * 2.3.99 Updates
10 *
11 * In addition to the individual control of the communication
12 * channels, there are a few functions that globally affect the
13 * communication processor.
14 *
15 * Buffer descriptors must be allocated from the dual ported memory
16 * space. The allocator for that is here. When the communication
17 * process is reset, we reclaim the memory available. There is
18 * currently no deallocator for this memory.
19 */
20#include <common.h>
21#include <asm/cpm_8260.h>
22
Wolfgang Denk6405a152006-03-31 18:32:53 +020023DECLARE_GLOBAL_DATA_PTR;
24
wdenk121cb962002-10-07 19:37:29 +000025void
26m8260_cpm_reset(void)
27{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020028 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk121cb962002-10-07 19:37:29 +000029 volatile ulong count;
30
31 /* Reclaim the DP memory for our use.
32 */
Simon Glass93980082012-12-13 20:48:58 +000033 gd->arch.dp_alloc_base = CPM_DATAONLY_BASE;
34 gd->arch.dp_alloc_top = gd->arch.dp_alloc_base + CPM_DATAONLY_SIZE;
wdenk121cb962002-10-07 19:37:29 +000035
36 /*
37 * Reset CPM
38 */
39 immr->im_cpm.cp_cpcr = CPM_CR_RST;
40 count = 0;
41 do { /* Spin until command processed */
42 __asm__ __volatile__ ("eieio");
43 } while ((immr->im_cpm.cp_cpcr & CPM_CR_FLG) && ++count < 1000000);
wdenk121cb962002-10-07 19:37:29 +000044}
45
46/* Allocate some memory from the dual ported ram.
47 * To help protocols with object alignment restrictions, we do that
48 * if they ask.
49 */
50uint
51m8260_cpm_dpalloc(uint size, uint align)
52{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020053 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk121cb962002-10-07 19:37:29 +000054 uint retloc;
55 uint align_mask, off;
56 uint savebase;
57
58 align_mask = align - 1;
Simon Glass93980082012-12-13 20:48:58 +000059 savebase = gd->arch.dp_alloc_base;
wdenk121cb962002-10-07 19:37:29 +000060
Simon Glass93980082012-12-13 20:48:58 +000061 off = gd->arch.dp_alloc_base & align_mask;
62 if (off != 0)
63 gd->arch.dp_alloc_base += (align - off);
wdenk121cb962002-10-07 19:37:29 +000064
65 if ((off = size & align_mask) != 0)
66 size += align - off;
67
Simon Glass93980082012-12-13 20:48:58 +000068 if ((gd->arch.dp_alloc_base + size) >= gd->arch.dp_alloc_top) {
69 gd->arch.dp_alloc_base = savebase;
wdenk121cb962002-10-07 19:37:29 +000070 panic("m8260_cpm_dpalloc: ran out of dual port ram!");
71 }
72
Simon Glass93980082012-12-13 20:48:58 +000073 retloc = gd->arch.dp_alloc_base;
74 gd->arch.dp_alloc_base += size;
wdenk121cb962002-10-07 19:37:29 +000075
76 memset((void *)&immr->im_dprambase[retloc], 0, size);
77
78 return(retloc);
79}
80
81/* We also own one page of host buffer space for the allocation of
82 * UART "fifos" and the like.
83 */
84uint
85m8260_cpm_hostalloc(uint size, uint align)
86{
87 /* the host might not even have RAM yet - just use dual port RAM */
88 return (m8260_cpm_dpalloc(size, align));
89}
90
91/* Set a baud rate generator. This needs lots of work. There are
92 * eight BRGs, which can be connected to the CPM channels or output
93 * as clocks. The BRGs are in two different block of internal
94 * memory mapped space.
95 * The baud rate clock is the system clock divided by something.
96 * It was set up long ago during the initial boot phase and is
97 * is given to us.
98 * Baud rate clocks are zero-based in the driver code (as that maps
99 * to port numbers). Documentation uses 1-based numbering.
100 */
Simon Glass34a194f2012-12-13 20:48:44 +0000101#define BRG_INT_CLK gd->arch.brg_clk
wdenkdccbda02003-07-14 22:13:32 +0000102#define BRG_UART_CLK (BRG_INT_CLK / 16)
wdenk121cb962002-10-07 19:37:29 +0000103
wdenkdccbda02003-07-14 22:13:32 +0000104/* This function is used by UARTs, or anything else that uses a 16x
wdenk121cb962002-10-07 19:37:29 +0000105 * oversampled clock.
106 */
107void
108m8260_cpm_setbrg(uint brg, uint rate)
109{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200110 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk121cb962002-10-07 19:37:29 +0000111 volatile uint *bp;
wdenkdccbda02003-07-14 22:13:32 +0000112 uint cd = BRG_UART_CLK / rate;
wdenk121cb962002-10-07 19:37:29 +0000113
wdenkdccbda02003-07-14 22:13:32 +0000114 if ((BRG_UART_CLK % rate) < (rate / 2))
115 cd--;
wdenk121cb962002-10-07 19:37:29 +0000116 if (brg < 4) {
117 bp = (uint *)&immr->im_brgc1;
118 }
119 else {
120 bp = (uint *)&immr->im_brgc5;
121 brg -= 4;
122 }
123 bp += brg;
wdenkdccbda02003-07-14 22:13:32 +0000124 *bp = (cd << 1) | CPM_BRG_EN;
wdenk121cb962002-10-07 19:37:29 +0000125}
126
127/* This function is used to set high speed synchronous baud rate
128 * clocks.
129 */
130void
131m8260_cpm_fastbrg(uint brg, uint rate, int div16)
132{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200133 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk121cb962002-10-07 19:37:29 +0000134 volatile uint *bp;
135
136 /* This is good enough to get SMCs running.....
137 */
138 if (brg < 4) {
139 bp = (uint *)&immr->im_brgc1;
140 }
141 else {
142 bp = (uint *)&immr->im_brgc5;
143 brg -= 4;
144 }
145 bp += brg;
146 *bp = (((((BRG_INT_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN;
147 if (div16)
148 *bp |= CPM_BRG_DIV16;
149}
150
151/* This function is used to set baud rate generators using an external
152 * clock source and 16x oversampling.
153 */
154
155void
156m8260_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel)
157{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200158 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk121cb962002-10-07 19:37:29 +0000159 volatile uint *bp;
160
161 if (brg < 4) {
162 bp = (uint *)&immr->im_brgc1;
163 }
164 else {
165 bp = (uint *)&immr->im_brgc5;
166 brg -= 4;
167 }
168 bp += brg;
169 *bp = ((((((extclk/16)+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN;
170 if (pinsel == 0)
171 *bp |= CPM_BRG_EXTC_CLK3_9;
172 else
173 *bp |= CPM_BRG_EXTC_CLK5_15;
174}