blob: 359a75feb19874001fd933494bbdbbe4f628e2a5 [file] [log] [blame]
Caleb Connolly16ccdfd2024-02-26 17:26:34 +00001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Qualcomm interconnect IDs
4 *
5 * Copyright (c) 2019, Linaro Ltd.
6 * Author: Georgi Djakov <georgi.djakov@linaro.org>
7 */
8
9#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8916_H
10#define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8916_H
11
12#define BIMC_SNOC_SLV 0
13#define MASTER_JPEG 1
14#define MASTER_MDP_PORT0 2
15#define MASTER_QDSS_BAM 3
16#define MASTER_QDSS_ETR 4
17#define MASTER_SNOC_CFG 5
18#define MASTER_VFE 6
19#define MASTER_VIDEO_P0 7
20#define SNOC_MM_INT_0 8
21#define SNOC_MM_INT_1 9
22#define SNOC_MM_INT_2 10
23#define SNOC_MM_INT_BIMC 11
24#define PCNOC_SNOC_SLV 12
25#define SLAVE_APSS 13
26#define SLAVE_CATS_128 14
27#define SLAVE_OCMEM_64 15
28#define SLAVE_IMEM 16
29#define SLAVE_QDSS_STM 17
30#define SLAVE_SRVC_SNOC 18
31#define SNOC_BIMC_0_MAS 19
32#define SNOC_BIMC_1_MAS 20
33#define SNOC_INT_0 21
34#define SNOC_INT_1 22
35#define SNOC_INT_BIMC 23
36#define SNOC_PCNOC_MAS 24
37#define SNOC_QDSS_INT 25
38
39#define BIMC_SNOC_MAS 0
40#define MASTER_AMPSS_M0 1
41#define MASTER_GRAPHICS_3D 2
42#define MASTER_TCU0 3
43#define MASTER_TCU1 4
44#define SLAVE_AMPSS_L2 5
45#define SLAVE_EBI_CH0 6
46#define SNOC_BIMC_0_SLV 7
47#define SNOC_BIMC_1_SLV 8
48
49#define MASTER_BLSP_1 0
50#define MASTER_DEHR 1
51#define MASTER_LPASS 2
52#define MASTER_CRYPTO_CORE0 3
53#define MASTER_SDCC_1 4
54#define MASTER_SDCC_2 5
55#define MASTER_SPDM 6
56#define MASTER_USB_HS 7
57#define PCNOC_INT_0 8
58#define PCNOC_INT_1 9
59#define PCNOC_MAS_0 10
60#define PCNOC_MAS_1 11
61#define PCNOC_SLV_0 12
62#define PCNOC_SLV_1 13
63#define PCNOC_SLV_2 14
64#define PCNOC_SLV_3 15
65#define PCNOC_SLV_4 16
66#define PCNOC_SLV_8 17
67#define PCNOC_SLV_9 18
68#define PCNOC_SNOC_MAS 19
69#define SLAVE_BIMC_CFG 20
70#define SLAVE_BLSP_1 21
71#define SLAVE_BOOT_ROM 22
72#define SLAVE_CAMERA_CFG 23
73#define SLAVE_CLK_CTL 24
74#define SLAVE_CRYPTO_0_CFG 25
75#define SLAVE_DEHR_CFG 26
76#define SLAVE_DISPLAY_CFG 27
77#define SLAVE_GRAPHICS_3D_CFG 28
78#define SLAVE_IMEM_CFG 29
79#define SLAVE_LPASS 30
80#define SLAVE_MPM 31
81#define SLAVE_MSG_RAM 32
82#define SLAVE_MSS 33
83#define SLAVE_PDM 34
84#define SLAVE_PMIC_ARB 35
85#define SLAVE_PCNOC_CFG 36
86#define SLAVE_PRNG 37
87#define SLAVE_QDSS_CFG 38
88#define SLAVE_RBCPR_CFG 39
89#define SLAVE_SDCC_1 40
90#define SLAVE_SDCC_2 41
91#define SLAVE_SECURITY 42
92#define SLAVE_SNOC_CFG 43
93#define SLAVE_SPDM 44
94#define SLAVE_TCSR 45
95#define SLAVE_TLMM 46
96#define SLAVE_USB_HS 47
97#define SLAVE_VENUS_CFG 48
98#define SNOC_PCNOC_SLV 49
99
100#endif