| Andy Yan | b5e1630 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * (C) Copyright 2017 Rockchip Electronics Co., Ltd |
| 4 | */ |
| 5 | |
| 6 | #ifndef __CONFIG_RK3308_COMMON_H |
| 7 | #define __CONFIG_RK3308_COMMON_H |
| 8 | |
| 9 | #include "rockchip-common.h" |
| 10 | |
| Tom Rini | 3088b31 | 2022-12-04 10:04:13 -0500 | [diff] [blame] | 11 | #define CFG_IRAM_BASE 0xfff80000 |
| Andy Yan | b5e1630 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 12 | |
| Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 13 | #define CFG_SYS_SDRAM_BASE 0 |
| Andy Yan | b5e1630 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 14 | #define SDRAM_MAX_SIZE 0xff000000 |
| Andy Yan | b5e1630 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 15 | |
| Andy Yan | b5e1630 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 16 | #define ENV_MEM_LAYOUT_SETTINGS \ |
| 17 | "scriptaddr=0x00500000\0" \ |
| 18 | "pxefile_addr_r=0x00600000\0" \ |
| FUKAUMI Naoki | 9a171a0 | 2023-09-11 19:01:20 +0900 | [diff] [blame] | 19 | "fdt_addr_r=0x03e00000\0" \ |
| FUKAUMI Naoki | 4e8ecca | 2023-09-11 19:01:21 +0900 | [diff] [blame] | 20 | "fdtoverlay_addr_r=0x03f00000\0" \ |
| Andy Yan | b5e1630 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 21 | "kernel_addr_r=0x00680000\0" \ |
| 22 | "ramdisk_addr_r=0x04000000\0" |
| 23 | |
| Tom Rini | c9edebe | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 24 | #define CFG_EXTRA_ENV_SETTINGS \ |
| FUKAUMI Naoki | 9a171a0 | 2023-09-11 19:01:20 +0900 | [diff] [blame] | 25 | "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ |
| Andy Yan | b5e1630 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 26 | ENV_MEM_LAYOUT_SETTINGS \ |
| 27 | "partitions=" PARTS_DEFAULT \ |
| 28 | ROCKCHIP_DEVICE_SETTINGS \ |
| Simon Glass | f27e9d5 | 2023-04-24 13:49:51 +1200 | [diff] [blame] | 29 | "boot_targets=" BOOT_TARGETS "\0" |
| Andy Yan | b5e1630 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 30 | |
| 31 | #endif |