Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7622-pinctrl.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: MediaTek MT7622 Pin Controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Sean Wang <sean.wang@kernel.org> |
| 11 | |
| 12 | description: |
| 13 | The MediaTek's MT7622 Pin controller is used to control SoC pins. |
| 14 | |
| 15 | properties: |
| 16 | compatible: |
| 17 | enum: |
| 18 | - mediatek,mt7622-pinctrl |
| 19 | - mediatek,mt7629-pinctrl |
| 20 | |
| 21 | reg: |
| 22 | maxItems: 1 |
| 23 | |
| 24 | reg-names: |
| 25 | items: |
| 26 | - const: eint |
| 27 | |
| 28 | gpio-controller: true |
| 29 | |
| 30 | "#gpio-cells": |
| 31 | const: 2 |
| 32 | description: |
| 33 | Number of cells in GPIO specifier. Since the generic GPIO binding is used, |
| 34 | the amount of cells must be specified as 2. See the below mentioned gpio |
| 35 | binding representation for description of particular cells. |
| 36 | |
| 37 | interrupt-controller: true |
| 38 | |
| 39 | interrupts: |
| 40 | maxItems: 1 |
| 41 | |
| 42 | "#interrupt-cells": |
| 43 | const: 2 |
| 44 | |
| 45 | allOf: |
| 46 | - $ref: pinctrl.yaml# |
| 47 | |
| 48 | required: |
| 49 | - compatible |
| 50 | - reg |
| 51 | - gpio-controller |
| 52 | - "#gpio-cells" |
| 53 | |
| 54 | if: |
| 55 | required: |
| 56 | - interrupt-controller |
| 57 | then: |
| 58 | required: |
| 59 | - reg-names |
| 60 | - interrupts |
| 61 | - "#interrupt-cells" |
| 62 | |
| 63 | patternProperties: |
| 64 | '-pins(-[a-z]+)?$': |
| 65 | type: object |
| 66 | additionalProperties: false |
| 67 | patternProperties: |
| 68 | '^mux(-|$)': |
| 69 | type: object |
| 70 | additionalProperties: false |
| 71 | description: |
| 72 | pinmux configuration nodes. |
| 73 | $ref: /schemas/pinctrl/pinmux-node.yaml |
| 74 | properties: |
| 75 | function: |
| 76 | description: |
| 77 | A string containing the name of the function to mux to the group. |
| 78 | enum: [emmc, eth, i2c, i2s, ir, led, flash, pcie, pmic, pwm, sd, |
| 79 | spi, tdm, uart, watchdog, wifi] |
| 80 | |
| 81 | groups: |
| 82 | description: |
| 83 | An array of strings. Each string contains the name of a group. |
| 84 | |
| 85 | drive-strength: |
| 86 | enum: [4, 8, 12, 16] |
| 87 | |
| 88 | required: |
| 89 | - groups |
| 90 | - function |
| 91 | |
| 92 | allOf: |
| 93 | - if: |
| 94 | properties: |
| 95 | function: |
| 96 | const: emmc |
| 97 | then: |
| 98 | properties: |
| 99 | groups: |
| 100 | enum: [emmc, emmc_rst] |
| 101 | - if: |
| 102 | properties: |
| 103 | function: |
| 104 | const: eth |
| 105 | then: |
| 106 | properties: |
| 107 | groups: |
| 108 | enum: [esw, esw_p0_p1, esw_p2_p3_p4, rgmii_via_esw, |
| 109 | rgmii_via_gmac1, rgmii_via_gmac2, mdc_mdio] |
| 110 | - if: |
| 111 | properties: |
| 112 | function: |
| 113 | const: i2c |
| 114 | then: |
| 115 | properties: |
| 116 | groups: |
| 117 | enum: [i2c0, i2c_0, i2c_1, i2c1_0, i2c1_1, i2c1_2, i2c2_0, |
| 118 | i2c2_1, i2c2_2] |
| 119 | - if: |
| 120 | properties: |
| 121 | function: |
| 122 | const: i2s |
| 123 | then: |
| 124 | properties: |
| 125 | groups: |
| 126 | enum: [i2s_in_mclk_bclk_ws, i2s1_in_data, i2s2_in_data, |
| 127 | i2s3_in_data, i2s4_in_data, i2s_out_mclk_bclk_ws, |
| 128 | i2s1_out_data, i2s2_out_data, i2s3_out_data, |
| 129 | i2s4_out_data] |
| 130 | - if: |
| 131 | properties: |
| 132 | function: |
| 133 | const: ir |
| 134 | then: |
| 135 | properties: |
| 136 | groups: |
| 137 | enum: [ir_0_tx, ir_1_tx, ir_2_tx, ir_0_rx, ir_1_rx, ir_2_rx] |
| 138 | - if: |
| 139 | properties: |
| 140 | function: |
| 141 | const: led |
| 142 | then: |
| 143 | properties: |
| 144 | groups: |
| 145 | enum: [ephy_leds, ephy0_led, ephy1_led, ephy2_led, ephy3_led, |
| 146 | ephy4_led, wled, wf2g_led, wf5g_led] |
| 147 | - if: |
| 148 | properties: |
| 149 | function: |
| 150 | const: flash |
| 151 | then: |
| 152 | properties: |
| 153 | groups: |
| 154 | enum: [par_nand, snfi, spi_nor] |
| 155 | - if: |
| 156 | properties: |
| 157 | function: |
| 158 | const: pcie |
| 159 | then: |
| 160 | properties: |
| 161 | groups: |
| 162 | enum: [pcie0_0_waken, pcie0_1_waken, pcie1_0_waken, |
| 163 | pcie0_0_clkreq, pcie0_1_clkreq, pcie1_0_clkreq, |
| 164 | pcie0_pad_perst, pcie1_pad_perst, pcie_pereset, |
| 165 | pcie_wake, pcie_clkreq] |
| 166 | - if: |
| 167 | properties: |
| 168 | function: |
| 169 | const: pmic |
| 170 | then: |
| 171 | properties: |
| 172 | groups: |
| 173 | enum: [pmic_bus] |
| 174 | - if: |
| 175 | properties: |
| 176 | function: |
| 177 | const: pwm |
| 178 | then: |
| 179 | properties: |
| 180 | groups: |
| 181 | enum: [pwm_ch1_0, pwm_ch1_1, pwm_ch1_2, pwm_ch2_0, pwm_ch2_1, |
| 182 | pwm_ch2_2, pwm_ch3_0, pwm_ch3_1, pwm_ch3_2, pwm_ch4_0, |
| 183 | pwm_ch4_1, pwm_ch4_2, pwm_ch4_3, pwm_ch5_0, pwm_ch5_1, |
| 184 | pwm_ch5_2, pwm_ch6_0, pwm_ch6_1, pwm_ch6_2, pwm_ch6_3, |
| 185 | pwm_ch7_0, pwm_0, pwm_1] |
| 186 | - if: |
| 187 | properties: |
| 188 | function: |
| 189 | const: sd |
| 190 | then: |
| 191 | properties: |
| 192 | groups: |
| 193 | enum: [sd_0, sd_1] |
| 194 | - if: |
| 195 | properties: |
| 196 | function: |
| 197 | const: spi |
| 198 | then: |
| 199 | properties: |
| 200 | groups: |
| 201 | enum: [spic0_0, spic0_1, spic1_0, spic1_1, spic2_0_wp_hold, |
| 202 | spic2_0, spi_0, spi_1, spi_wp, spi_hold] |
| 203 | - if: |
| 204 | properties: |
| 205 | function: |
| 206 | const: tdm |
| 207 | then: |
| 208 | properties: |
| 209 | groups: |
| 210 | enum: [tdm_0_out_mclk_bclk_ws, tdm_0_in_mclk_bclk_ws, |
| 211 | tdm_0_out_data, tdm_0_in_data, tdm_1_out_mclk_bclk_ws, |
| 212 | tdm_1_in_mclk_bclk_ws, tdm_1_out_data, tdm_1_in_data] |
| 213 | - if: |
| 214 | properties: |
| 215 | function: |
| 216 | const: uart |
| 217 | then: |
| 218 | properties: |
| 219 | groups: |
| 220 | enum: [uart0_0_tx_rx, uart1_0_tx_rx, uart1_0_rts_cts, |
| 221 | uart1_1_tx_rx, uart1_1_rts_cts, uart2_0_tx_rx, |
| 222 | uart2_0_rts_cts, uart2_1_tx_rx, uart2_1_rts_cts, |
| 223 | uart2_2_tx_rx, uart2_2_rts_cts, uart2_3_tx_rx, |
| 224 | uart3_0_tx_rx, uart3_1_tx_rx, uart3_1_rts_cts, |
| 225 | uart4_0_tx_rx, uart4_1_tx_rx, uart4_1_rts_cts, |
| 226 | uart4_2_tx_rx, uart4_2_rts_cts, uart0_txd_rxd, |
| 227 | uart1_0_txd_rxd, uart1_0_cts_rts, uart1_1_txd_rxd, |
| 228 | uart1_1_cts_rts, uart2_0_txd_rxd, uart2_0_cts_rts, |
| 229 | uart2_1_txd_rxd, uart2_1_cts_rts] |
| 230 | - if: |
| 231 | properties: |
| 232 | function: |
| 233 | const: watchdog |
| 234 | then: |
| 235 | properties: |
| 236 | groups: |
| 237 | enum: [watchdog] |
| 238 | - if: |
| 239 | properties: |
| 240 | function: |
| 241 | const: wifi |
| 242 | then: |
| 243 | properties: |
| 244 | groups: |
| 245 | enum: [wf0_2g, wf0_5g] |
| 246 | |
| 247 | '^conf(-|$)': |
| 248 | type: object |
| 249 | additionalProperties: false |
| 250 | description: |
| 251 | pinconf configuration nodes. |
| 252 | $ref: /schemas/pinctrl/pincfg-node.yaml |
| 253 | |
| 254 | properties: |
| 255 | groups: |
| 256 | description: |
| 257 | An array of strings. Each string contains the name of a group. |
| 258 | Valid values are the same as the pinmux node. |
| 259 | |
| 260 | pins: |
| 261 | description: |
| 262 | An array of strings. Each string contains the name of a pin. |
| 263 | enum: [GPIO_A, I2S1_IN, I2S1_OUT, I2S_BCLK, I2S_WS, I2S_MCLK, TXD0, |
| 264 | RXD0, SPI_WP, SPI_HOLD, SPI_CLK, SPI_MOSI, SPI_MISO, SPI_CS, |
| 265 | I2C_SDA, I2C_SCL, I2S2_IN, I2S3_IN, I2S4_IN, I2S2_OUT, |
| 266 | I2S3_OUT, I2S4_OUT, GPIO_B, MDC, MDIO, G2_TXD0, G2_TXD1, |
| 267 | G2_TXD2, G2_TXD3, G2_TXEN, G2_TXC, G2_RXD0, G2_RXD1, G2_RXD2, |
| 268 | G2_RXD3, G2_RXDV, G2_RXC, NCEB, NWEB, NREB, NDL4, NDL5, NDL6, |
| 269 | NDL7, NRB, NCLE, NALE, NDL0, NDL1, NDL2, NDL3, MDI_TP_P0, |
| 270 | MDI_TN_P0, MDI_RP_P0, MDI_RN_P0, MDI_TP_P1, MDI_TN_P1, |
| 271 | MDI_RP_P1, MDI_RN_P1, MDI_RP_P2, MDI_RN_P2, MDI_TP_P2, |
| 272 | MDI_TN_P2, MDI_TP_P3, MDI_TN_P3, MDI_RP_P3, MDI_RN_P3, |
| 273 | MDI_RP_P4, MDI_RN_P4, MDI_TP_P4, MDI_TN_P4, PMIC_SCL, |
| 274 | PMIC_SDA, SPIC1_CLK, SPIC1_MOSI, SPIC1_MISO, SPIC1_CS, |
| 275 | GPIO_D, WATCHDOG, RTS3_N, CTS3_N, TXD3, RXD3, PERST0_N, |
| 276 | PERST1_N, WLED_N, EPHY_LED0_N, AUXIN0, AUXIN1, AUXIN2, |
| 277 | AUXIN3, TXD4, RXD4, RTS4_N, CST4_N, PWM1, PWM2, PWM3, PWM4, |
| 278 | PWM5, PWM6, PWM7, GPIO_E, TOP_5G_CLK, TOP_5G_DATA, |
| 279 | WF0_5G_HB0, WF0_5G_HB1, WF0_5G_HB2, WF0_5G_HB3, WF0_5G_HB4, |
| 280 | WF0_5G_HB5, WF0_5G_HB6, XO_REQ, TOP_RST_N, SYS_WATCHDOG, |
| 281 | EPHY_LED0_N_JTDO, EPHY_LED1_N_JTDI, EPHY_LED2_N_JTMS, |
| 282 | EPHY_LED3_N_JTCLK, EPHY_LED4_N_JTRST_N, WF2G_LED_N, |
| 283 | WF5G_LED_N, GPIO_9, GPIO_10, GPIO_11, GPIO_12, UART1_TXD, |
| 284 | UART1_RXD, UART1_CTS, UART1_RTS, UART2_TXD, UART2_RXD, |
| 285 | UART2_CTS, UART2_RTS, SMI_MDC, SMI_MDIO, PCIE_PERESET_N, |
| 286 | PWM_0, GPIO_0, GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, |
| 287 | GPIO_6, GPIO_7, GPIO_8, UART0_TXD, UART0_RXD, TOP_2G_CLK, |
| 288 | TOP_2G_DATA, WF0_2G_HB0, WF0_2G_HB1, WF0_2G_HB2, WF0_2G_HB3, |
| 289 | WF0_2G_HB4, WF0_2G_HB5, WF0_2G_HB6] |
| 290 | |
| 291 | bias-disable: true |
| 292 | |
| 293 | bias-pull-up: true |
| 294 | |
| 295 | bias-pull-down: true |
| 296 | |
| 297 | input-enable: true |
| 298 | |
| 299 | input-disable: true |
| 300 | |
| 301 | output-enable: true |
| 302 | |
| 303 | output-low: true |
| 304 | |
| 305 | output-high: true |
| 306 | |
| 307 | input-schmitt-enable: true |
| 308 | |
| 309 | input-schmitt-disable: true |
| 310 | |
| 311 | drive-strength: |
| 312 | enum: [4, 8, 12, 16] |
| 313 | |
| 314 | slew-rate: |
| 315 | enum: [0, 1] |
| 316 | |
| 317 | mediatek,tdsel: |
| 318 | description: |
| 319 | An integer describing the steps for output level shifter duty |
| 320 | cycle when asserted (high pulse width adjustment). Valid arguments |
| 321 | are from 0 to 15. |
| 322 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 323 | |
| 324 | mediatek,rdsel: |
| 325 | description: |
| 326 | An integer describing the steps for input level shifter duty cycle |
| 327 | when asserted (high pulse width adjustment). Valid arguments are |
| 328 | from 0 to 63. |
| 329 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 330 | |
| 331 | required: |
| 332 | - pins |
| 333 | |
| 334 | additionalProperties: false |
| 335 | |
| 336 | examples: |
| 337 | - | |
| 338 | #include <dt-bindings/interrupt-controller/irq.h> |
| 339 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 340 | |
| 341 | soc { |
| 342 | #address-cells = <2>; |
| 343 | #size-cells = <2>; |
| 344 | |
| 345 | pio: pinctrl@10211000 { |
| 346 | compatible = "mediatek,mt7622-pinctrl"; |
| 347 | reg = <0 0x10211000 0 0x1000>; |
| 348 | gpio-controller; |
| 349 | #gpio-cells = <2>; |
| 350 | |
| 351 | pinctrl_eth_default: eth-pins { |
| 352 | mux-mdio { |
| 353 | groups = "mdc_mdio"; |
| 354 | function = "eth"; |
| 355 | drive-strength = <12>; |
| 356 | }; |
| 357 | |
| 358 | mux-gmac2 { |
| 359 | groups = "rgmii_via_gmac2"; |
| 360 | function = "eth"; |
| 361 | drive-strength = <12>; |
| 362 | }; |
| 363 | |
| 364 | mux-esw { |
| 365 | groups = "esw"; |
| 366 | function = "eth"; |
| 367 | drive-strength = <8>; |
| 368 | }; |
| 369 | |
| 370 | conf-mdio { |
| 371 | pins = "MDC"; |
| 372 | bias-pull-up; |
| 373 | }; |
| 374 | }; |
| 375 | }; |
| 376 | }; |