Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 2 | /* |
| 3 | * OMAP ulpi viewport support |
| 4 | * Based on drivers/usb/ulpi/ulpi-viewport.c |
| 5 | * |
Nishanth Menon | eaa39c6 | 2023-11-01 15:56:03 -0500 | [diff] [blame] | 6 | * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 7 | * Author: Govindraj R <govindraj.raja@ti.com> |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <common.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 11 | #include <log.h> |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 12 | #include <asm/io.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 13 | #include <linux/delay.h> |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 14 | #include <usb/ulpi.h> |
| 15 | |
Michael Trimarchi | df477ac | 2013-06-10 18:18:04 +0200 | [diff] [blame] | 16 | #define OMAP_ULPI_WR_OPSEL (2 << 22) |
| 17 | #define OMAP_ULPI_RD_OPSEL (3 << 22) |
| 18 | #define OMAP_ULPI_START (1 << 31) |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 19 | |
| 20 | /* |
Michael Trimarchi | df477ac | 2013-06-10 18:18:04 +0200 | [diff] [blame] | 21 | * Wait for having ulpi in done state |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 22 | */ |
| 23 | static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask) |
| 24 | { |
Tom Rini | 364d002 | 2023-01-10 11:19:45 -0500 | [diff] [blame] | 25 | int timeout = CFG_USB_ULPI_TIMEOUT; |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 26 | |
| 27 | while (--timeout) { |
Michael Trimarchi | df477ac | 2013-06-10 18:18:04 +0200 | [diff] [blame] | 28 | if (!(readl(ulpi_vp->viewport_addr) & mask)) |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 29 | return 0; |
| 30 | |
| 31 | udelay(1); |
| 32 | } |
| 33 | |
| 34 | return ULPI_ERROR; |
| 35 | } |
| 36 | |
| 37 | /* |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 38 | * Issue a ULPI read/write request |
| 39 | */ |
| 40 | static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32 value) |
| 41 | { |
| 42 | int err; |
| 43 | |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 44 | writel(value, ulpi_vp->viewport_addr); |
| 45 | |
Michael Trimarchi | df477ac | 2013-06-10 18:18:04 +0200 | [diff] [blame] | 46 | err = ulpi_wait(ulpi_vp, OMAP_ULPI_START); |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 47 | if (err) |
| 48 | debug("ULPI request timed out\n"); |
| 49 | |
| 50 | return err; |
| 51 | } |
| 52 | |
| 53 | int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value) |
| 54 | { |
Michael Trimarchi | df477ac | 2013-06-10 18:18:04 +0200 | [diff] [blame] | 55 | u32 val = OMAP_ULPI_START | (((ulpi_vp->port_num + 1) & 0xf) << 24) | |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 56 | OMAP_ULPI_WR_OPSEL | ((u32)reg << 16) | (value & 0xff); |
| 57 | |
| 58 | return ulpi_request(ulpi_vp, val); |
| 59 | } |
| 60 | |
| 61 | u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg) |
| 62 | { |
| 63 | int err; |
Michael Trimarchi | df477ac | 2013-06-10 18:18:04 +0200 | [diff] [blame] | 64 | u32 val = OMAP_ULPI_START | (((ulpi_vp->port_num + 1) & 0xf) << 24) | |
| 65 | OMAP_ULPI_RD_OPSEL | ((u32)reg << 16); |
Govindraj.R | c5e5707 | 2012-02-06 03:55:32 +0000 | [diff] [blame] | 66 | |
| 67 | err = ulpi_request(ulpi_vp, val); |
| 68 | if (err) |
| 69 | return err; |
| 70 | |
| 71 | return readl(ulpi_vp->viewport_addr) & 0xff; |
| 72 | } |