blob: e37893c3e5351f7adf9af5e6306a048ca27d1db7 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
TsiChungLiew8ab28df2007-07-05 23:10:40 -05002/*
3 *
Alison Wang35d23df2012-03-26 21:49:05 +00004 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiew8ab28df2007-07-05 23:10:40 -05005 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChungLiew8ab28df2007-07-05 23:10:40 -05006 */
7
8/* CPU specific interrupt routine */
Simon Glass9b61c7c2019-11-14 12:57:41 -07009#include <irq_func.h>
TsiChungLiew8ab28df2007-07-05 23:10:40 -050010#include <asm/immap.h>
Alison Wang35d23df2012-03-26 21:49:05 +000011#include <asm/io.h>
TsiChungLiew8ab28df2007-07-05 23:10:40 -050012
13int interrupt_init(void)
14{
Tom Rini364d0022023-01-10 11:19:45 -050015 int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
TsiChungLiew8ab28df2007-07-05 23:10:40 -050016
17 /* Make sure all interrupts are disabled */
Alison Wang35d23df2012-03-26 21:49:05 +000018 setbits_be32(&intp->imrh0, 0xffffffff);
19 setbits_be32(&intp->imrl0, 0xffffffff);
TsiChungLiew8ab28df2007-07-05 23:10:40 -050020
21 enable_interrupts();
22 return 0;
23}
24
Marek Vasut38908f52023-03-23 01:20:39 +010025#if CONFIG_IS_ENABLED(MCFTMR)
TsiChungLiew8ab28df2007-07-05 23:10:40 -050026void dtimer_intr_setup(void)
27{
Tom Rini364d0022023-01-10 11:19:45 -050028 int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
TsiChungLiew8ab28df2007-07-05 23:10:40 -050029
Tom Rini364d0022023-01-10 11:19:45 -050030 out_8(&intp->icr0[CFG_SYS_TMRINTR_NO], CFG_SYS_TMRINTR_PRI);
31 clrbits_be32(&intp->imrh0, CFG_SYS_TMRINTR_MASK);
TsiChungLiew8ab28df2007-07-05 23:10:40 -050032}
33#endif