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git01.mediatek.com / filogic / uboot / 084a5f095e966dacb415dc92829dd4a2e0286884 / . / board / freescale / mx28evk / iomux.c
blob: 396761bdff02d2f57294002ea4de207bbafa5191 [file] [log] [blame]
Fabio Estevam5ffd3c52011-12-20 05:46:34 +0000[diff] [blame]1/*
2 * Freescale MX28EVK IOMUX setup
3 *
4 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
5 * on behalf of DENX Software Engineering GmbH
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 */
20
21#include <common.h>
22#include <config.h>
23#include <asm/io.h>
24#include <asm/arch/iomux-mx28.h>
25#include <asm/arch/imx-regs.h>
26#include <asm/arch/sys_proto.h>
27
28#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
29#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
30#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
Matthias Fuchs084a5f02012-01-18 01:33:09 +0000[diff] [blame^]31#define MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
Fabio Estevam5ffd3c52011-12-20 05:46:34 +0000[diff] [blame]32
33const iomux_cfg_t iomux_setup[] = {
34 /* DUART */
35 MX28_PAD_PWM0__DUART_RX,
36 MX28_PAD_PWM1__DUART_TX,
37
38 /* MMC0 */
39 MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0,
40 MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0,
41 MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0,
42 MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0,
43 MX28_PAD_SSP0_DATA4__SSP0_D4 | MUX_CONFIG_SSP0,
44 MX28_PAD_SSP0_DATA5__SSP0_D5 | MUX_CONFIG_SSP0,
45 MX28_PAD_SSP0_DATA6__SSP0_D6 | MUX_CONFIG_SSP0,
46 MX28_PAD_SSP0_DATA7__SSP0_D7 | MUX_CONFIG_SSP0,
47 MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0,
48 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
49 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
50 MX28_PAD_SSP0_SCK__SSP0_SCK |
51 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
52 /* write protect */
53 MX28_PAD_SSP1_SCK__GPIO_2_12,
54 /* MMC0 slot power enable */
55 MX28_PAD_PWM3__GPIO_3_28 |
56 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
57
58 /* FEC0 */
59 MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
60 MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
61 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET,
62 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
63 MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET,
64 MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET,
65 MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
66 MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
67 MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
68 /* FEC0 Enable */
69 MX28_PAD_SSP1_DATA3__GPIO_2_15 |
70 (MXS_PAD_12MA | MXS_PAD_3V3),
71 /* FEC0 Reset */
72 MX28_PAD_ENET0_RX_CLK__GPIO_4_13 |
73 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
74
75 /* FEC1 */
76 MX28_PAD_ENET0_COL__ENET1_TX_EN | MUX_CONFIG_ENET,
77 MX28_PAD_ENET0_CRS__ENET1_RX_EN | MUX_CONFIG_ENET,
78 MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MUX_CONFIG_ENET,
79 MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET,
80 MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET,
81 MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET,
82
83 /* EMI */
84 MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
85 MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
86 MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
87 MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
88 MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
89 MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
90 MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
91 MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
92 MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
93 MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
94 MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
95 MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
96 MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
97 MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
98 MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
99 MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
100 MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
101 MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
102 MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
103 MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
104 MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
105 MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
106 MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
107 MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
108 MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
109
110 MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
111 MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
112 MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
113 MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
114 MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
115 MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
116 MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
117 MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
118 MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
119 MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
120 MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
121 MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
122 MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
123 MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI,
124 MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI,
125 MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
126 MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
127 MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
128 MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
129 MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
130 MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
131 MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
132 MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
133 MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
Matthias Fuchs084a5f02012-01-18 01:33:09 +0000[diff] [blame^]134
135 /* SPI2 (for SPI flash) */
136 MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
137 MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2,
138 MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
139 MX28_PAD_SSP2_SS0__SSP2_D3 |
140 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
Fabio Estevam5ffd3c52011-12-20 05:46:34 +0000[diff] [blame]141};
142
143void board_init_ll(void)
144{
145 mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
146}