blob: 1632238bf5dd5f3e5a21f03226cbfc17bbbc5e8e [file] [log] [blame]
Adam Ford14879032020-05-03 08:11:33 -05001// SPDX-License-Identifier: GPL-2.0+
2
3#include <common.h>
4#include <cpu_func.h>
5#include <hang.h>
Simon Glass97589732020-05-10 11:40:02 -06006#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -06007#include <log.h>
Adam Ford14879032020-05-03 08:11:33 -05008#include <spl.h>
Simon Glass3ba929a2020-10-30 21:38:53 -06009#include <asm/global_data.h>
Adam Ford14879032020-05-03 08:11:33 -050010#include <asm/io.h>
11#include <asm/mach-imx/iomux-v3.h>
12#include <asm/arch/clock.h>
13#include <asm/arch/imx8mm_pins.h>
14#include <asm/arch/sys_proto.h>
15#include <asm/mach-imx/boot_mode.h>
16#include <asm/arch/ddr.h>
Shiji Yangbb112342023-08-03 09:47:16 +080017#include <asm/sections.h>
Adam Ford14879032020-05-03 08:11:33 -050018
19#include <dm/uclass.h>
20#include <dm/device.h>
21#include <dm/uclass-internal.h>
22#include <dm/device-internal.h>
23
24#include <power/pmic.h>
25#include <power/bd71837.h>
26
27DECLARE_GLOBAL_DATA_PTR;
28
29int spl_board_boot_device(enum boot_device boot_dev_spl)
30{
31 switch (boot_dev_spl) {
32 case SD2_BOOT:
33 case MMC2_BOOT:
34 return BOOT_DEVICE_MMC1;
35 case SD3_BOOT:
36 case MMC3_BOOT:
37 return BOOT_DEVICE_MMC2;
Adam Ford2cc246a2022-10-22 09:28:23 -050038 case USB_BOOT:
39 return BOOT_DEVICE_BOARD;
Adam Ford25f43c62023-02-01 19:58:41 -060040 case QSPI_BOOT:
41 return BOOT_DEVICE_NOR;
Adam Ford14879032020-05-03 08:11:33 -050042 default:
43 return BOOT_DEVICE_NONE;
44 }
45}
46
47static void spl_dram_init(void)
48{
49 ddr_init(&dram_timing);
50}
51
Adam Ford25f43c62023-02-01 19:58:41 -060052void spl_board_init(void)
53{
54 arch_misc_init();
55}
56
Adam Ford14879032020-05-03 08:11:33 -050057#ifdef CONFIG_SPL_LOAD_FIT
58int board_fit_config_name_match(const char *name)
59{
60 /* Just empty function now - can't decide what to choose */
61 debug("%s: %s\n", __func__, name);
62
63 return 0;
64}
65#endif
66
Adam Ford14879032020-05-03 08:11:33 -050067static int power_init_board(void)
68{
69 struct udevice *dev;
70 int ret;
71
72 ret = pmic_get("pmic@4b", &dev);
73 if (ret == -ENODEV) {
74 puts("No pmic\n");
75 return 0;
76 }
77 if (ret != 0)
78 return ret;
79
80 /* decrease RESET key long push time from the default 10s to 10ms */
81 pmic_reg_write(dev, BD718XX_PWRONCONFIG1, 0x0);
82
83 /* unlock the PMIC regs */
84 pmic_reg_write(dev, BD718XX_REGLOCK, 0x1);
85
86 /* increase VDD_SOC to typical value 0.85v before first DRAM access */
87 pmic_reg_write(dev, BD718XX_BUCK1_VOLT_RUN, 0x0f);
88
89 /* increase VDD_DRAM to 0.975v for 3Ghz DDR */
90 pmic_reg_write(dev, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83);
91
92 /* lock the PMIC regs */
93 pmic_reg_write(dev, BD718XX_REGLOCK, 0x11);
94
95 return 0;
96}
97
98void board_init_f(ulong dummy)
99{
100 struct udevice *dev;
101 int ret;
102
103 arch_cpu_init();
104
105 init_uart_clk(1);
106
Adam Ford14879032020-05-03 08:11:33 -0500107 timer_init();
108
Adam Ford14879032020-05-03 08:11:33 -0500109 /* Clear the BSS. */
110 memset(__bss_start, 0, __bss_end - __bss_start);
111
112 ret = spl_early_init();
113 if (ret) {
114 debug("spl_early_init() failed: %d\n", ret);
115 hang();
116 }
117
Peng Fana9ed59c2022-06-11 20:20:55 +0800118 preloader_console_init();
119
Adam Ford14879032020-05-03 08:11:33 -0500120 ret = uclass_get_device_by_name(UCLASS_CLK,
121 "clock-controller@30380000",
122 &dev);
123 if (ret < 0) {
124 printf("Failed to find clock node. Check device tree\n");
125 hang();
126 }
127
128 enable_tzc380();
129
130 power_init_board();
131
132 /* DDR initialization */
133 spl_dram_init();
134
135 board_init_r(NULL, 0);
136}