blob: 6b762e581ad899202d8ae0acad6790c65c45ff06 [file] [log] [blame]
Simon Glass4a56f102015-01-27 22:13:47 -07001/*
2 * Copyright (C) 2013, Intel Corporation
3 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
Andrew Bradford74fdb582015-08-07 08:36:35 -04004 * Copyright (C) 2015, Kodak Alaris, Inc
Simon Glass4a56f102015-01-27 22:13:47 -07005 *
6 * SPDX-License-Identifier: Intel
7 */
8
9#include <common.h>
Andrew Bradford74fdb582015-08-07 08:36:35 -040010#include <fdtdec.h>
Simon Glass4a56f102015-01-27 22:13:47 -070011#include <asm/fsp/fsp_support.h>
12
Andrew Bradford74fdb582015-08-07 08:36:35 -040013DECLARE_GLOBAL_DATA_PTR;
14
Andrew Bradford74fdb582015-08-07 08:36:35 -040015/**
Bin Menge6d48c62017-10-13 01:30:05 -070016 * Override the FSP's Azalia configuration data
17 *
18 * @azalia: pointer to be updated to point to a ROM address where Azalia
19 * configuration data is stored
20 */
Bin Meng07e245c2017-10-13 01:30:06 -070021__weak void update_fsp_azalia_configs(struct azalia_config **azalia)
Bin Menge6d48c62017-10-13 01:30:05 -070022{
Bin Meng07e245c2017-10-13 01:30:06 -070023 *azalia = NULL;
Bin Menge6d48c62017-10-13 01:30:05 -070024}
25
26/**
Bin Mengc24aebd2015-12-10 22:03:00 -080027 * Override the FSP's configuration data.
Andrew Bradford74fdb582015-08-07 08:36:35 -040028 * If the device tree does not specify an integer setting, use the default
29 * provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file.
30 */
Bin Meng4a076fe2015-12-10 22:03:04 -080031void update_fsp_configs(struct fsp_config_data *config,
32 struct fspinit_rtbuf *rt_buf)
Simon Glass4a56f102015-01-27 22:13:47 -070033{
Bin Mengc24aebd2015-12-10 22:03:00 -080034 struct upd_region *fsp_upd = &config->fsp_upd;
Simon Glass4a56f102015-01-27 22:13:47 -070035 struct memory_down_data *mem;
Andrew Bradford74fdb582015-08-07 08:36:35 -040036 const void *blob = gd->fdt_blob;
37 int node;
Simon Glass4a56f102015-01-27 22:13:47 -070038
Bin Meng4a076fe2015-12-10 22:03:04 -080039 /* Initialize runtime buffer for fsp_init() */
40 rt_buf->common.stack_top = config->common.stack_top - 32;
41 rt_buf->common.boot_mode = config->common.boot_mode;
42 rt_buf->common.upd_data = &config->fsp_upd;
43
Andrew Bradford74fdb582015-08-07 08:36:35 -040044 node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP);
45 if (node < 0) {
46 debug("%s: Cannot find FSP node\n", __func__);
47 return;
48 }
49
50 fsp_upd->mrc_init_tseg_size = fdtdec_get_int(blob, node,
51 "fsp,mrc-init-tseg-size",
Bin Meng497c5162017-05-31 01:04:14 -070052 MRC_INIT_TSEG_SIZE_1MB);
Andrew Bradford74fdb582015-08-07 08:36:35 -040053 fsp_upd->mrc_init_mmio_size = fdtdec_get_int(blob, node,
54 "fsp,mrc-init-mmio-size",
Bin Meng497c5162017-05-31 01:04:14 -070055 MRC_INIT_MMIO_SIZE_2048MB);
Andrew Bradford74fdb582015-08-07 08:36:35 -040056 fsp_upd->mrc_init_spd_addr1 = fdtdec_get_int(blob, node,
57 "fsp,mrc-init-spd-addr1",
58 0xa0);
59 fsp_upd->mrc_init_spd_addr2 = fdtdec_get_int(blob, node,
60 "fsp,mrc-init-spd-addr2",
61 0xa2);
62 fsp_upd->emmc_boot_mode = fdtdec_get_int(blob, node,
Bin Meng497c5162017-05-31 01:04:14 -070063 "fsp,emmc-boot-mode",
64 EMMC_BOOT_MODE_EMMC41);
Andrew Bradford74fdb582015-08-07 08:36:35 -040065 fsp_upd->enable_sdio = fdtdec_get_bool(blob, node, "fsp,enable-sdio");
66 fsp_upd->enable_sdcard = fdtdec_get_bool(blob, node,
67 "fsp,enable-sdcard");
68 fsp_upd->enable_hsuart0 = fdtdec_get_bool(blob, node,
69 "fsp,enable-hsuart0");
70 fsp_upd->enable_hsuart1 = fdtdec_get_bool(blob, node,
71 "fsp,enable-hsuart1");
72 fsp_upd->enable_spi = fdtdec_get_bool(blob, node, "fsp,enable-spi");
73 fsp_upd->enable_sata = fdtdec_get_bool(blob, node, "fsp,enable-sata");
Bin Meng497c5162017-05-31 01:04:14 -070074 fsp_upd->sata_mode = fdtdec_get_int(blob, node, "fsp,sata-mode",
75 SATA_MODE_AHCI);
Andrew Bradford74fdb582015-08-07 08:36:35 -040076 fsp_upd->enable_azalia = fdtdec_get_bool(blob, node,
77 "fsp,enable-azalia");
Bin Menge6d48c62017-10-13 01:30:05 -070078 if (fsp_upd->enable_azalia)
79 update_fsp_azalia_configs(&fsp_upd->azalia_cfg_ptr);
Andrew Bradford74fdb582015-08-07 08:36:35 -040080 fsp_upd->enable_xhci = fdtdec_get_bool(blob, node, "fsp,enable-xhci");
Bin Menge5bf9692017-05-31 01:04:15 -070081 fsp_upd->lpe_mode = fdtdec_get_int(blob, node, "fsp,lpe-mode",
82 LPE_MODE_PCI);
83 fsp_upd->lpss_sio_mode = fdtdec_get_int(blob, node, "fsp,lpss-sio-mode",
84 LPSS_SIO_MODE_PCI);
Andrew Bradford74fdb582015-08-07 08:36:35 -040085 fsp_upd->enable_dma0 = fdtdec_get_bool(blob, node, "fsp,enable-dma0");
86 fsp_upd->enable_dma1 = fdtdec_get_bool(blob, node, "fsp,enable-dma1");
87 fsp_upd->enable_i2_c0 = fdtdec_get_bool(blob, node, "fsp,enable-i2c0");
88 fsp_upd->enable_i2_c1 = fdtdec_get_bool(blob, node, "fsp,enable-i2c1");
89 fsp_upd->enable_i2_c2 = fdtdec_get_bool(blob, node, "fsp,enable-i2c2");
90 fsp_upd->enable_i2_c3 = fdtdec_get_bool(blob, node, "fsp,enable-i2c3");
91 fsp_upd->enable_i2_c4 = fdtdec_get_bool(blob, node, "fsp,enable-i2c4");
92 fsp_upd->enable_i2_c5 = fdtdec_get_bool(blob, node, "fsp,enable-i2c5");
93 fsp_upd->enable_i2_c6 = fdtdec_get_bool(blob, node, "fsp,enable-i2c6");
94 fsp_upd->enable_pwm0 = fdtdec_get_bool(blob, node, "fsp,enable-pwm0");
95 fsp_upd->enable_pwm1 = fdtdec_get_bool(blob, node, "fsp,enable-pwm1");
96 fsp_upd->enable_hsi = fdtdec_get_bool(blob, node, "fsp,enable-hsi");
97 fsp_upd->igd_dvmt50_pre_alloc = fdtdec_get_int(blob, node,
Bin Meng497c5162017-05-31 01:04:14 -070098 "fsp,igd-dvmt50-pre-alloc", IGD_DVMT50_PRE_ALLOC_64MB);
Andrew Bradford74fdb582015-08-07 08:36:35 -040099 fsp_upd->aperture_size = fdtdec_get_int(blob, node, "fsp,aperture-size",
Bin Meng497c5162017-05-31 01:04:14 -0700100 APERTURE_SIZE_256MB);
101 fsp_upd->gtt_size = fdtdec_get_int(blob, node, "fsp,gtt-size",
102 GTT_SIZE_2MB);
Andrew Bradford74fdb582015-08-07 08:36:35 -0400103 fsp_upd->mrc_debug_msg = fdtdec_get_bool(blob, node,
104 "fsp,mrc-debug-msg");
105 fsp_upd->isp_enable = fdtdec_get_bool(blob, node, "fsp,isp-enable");
Bin Menge5bf9692017-05-31 01:04:15 -0700106 fsp_upd->scc_mode = fdtdec_get_int(blob, node, "fsp,scc-mode",
107 SCC_MODE_PCI);
Andrew Bradford74fdb582015-08-07 08:36:35 -0400108 fsp_upd->igd_render_standby = fdtdec_get_bool(blob, node,
109 "fsp,igd-render-standby");
110 fsp_upd->txe_uma_enable = fdtdec_get_bool(blob, node,
111 "fsp,txe-uma-enable");
112 fsp_upd->os_selection = fdtdec_get_int(blob, node, "fsp,os-selection",
Bin Meng497c5162017-05-31 01:04:14 -0700113 OS_SELECTION_LINUX);
Andrew Bradford74fdb582015-08-07 08:36:35 -0400114 fsp_upd->emmc45_ddr50_enabled = fdtdec_get_bool(blob, node,
115 "fsp,emmc45-ddr50-enabled");
116 fsp_upd->emmc45_hs200_enabled = fdtdec_get_bool(blob, node,
117 "fsp,emmc45-hs200-enabled");
118 fsp_upd->emmc45_retune_timer_value = fdtdec_get_int(blob, node,
119 "fsp,emmc45-retune-timer-value", 8);
120 fsp_upd->enable_igd = fdtdec_get_bool(blob, node, "fsp,enable-igd");
Simon Glass4a56f102015-01-27 22:13:47 -0700121
122 mem = &fsp_upd->memory_params;
Andrew Bradford74fdb582015-08-07 08:36:35 -0400123 mem->enable_memory_down = fdtdec_get_bool(blob, node,
124 "fsp,enable-memory-down");
125 if (mem->enable_memory_down) {
126 node = fdtdec_next_compatible(blob, node,
127 COMPAT_INTEL_BAYTRAIL_FSP_MDP);
128 if (node < 0) {
129 debug("%s: Cannot find FSP memory-down-params node\n",
130 __func__);
131 } else {
132 mem->dram_speed = fdtdec_get_int(blob, node,
133 "fsp,dram-speed",
Bin Meng497c5162017-05-31 01:04:14 -0700134 DRAM_SPEED_1333MTS);
Andrew Bradford74fdb582015-08-07 08:36:35 -0400135 mem->dram_type = fdtdec_get_int(blob, node,
Bin Meng497c5162017-05-31 01:04:14 -0700136 "fsp,dram-type",
137 DRAM_TYPE_DDR3L);
Andrew Bradford74fdb582015-08-07 08:36:35 -0400138 mem->dimm_0_enable = fdtdec_get_bool(blob, node,
139 "fsp,dimm-0-enable");
140 mem->dimm_1_enable = fdtdec_get_bool(blob, node,
141 "fsp,dimm-1-enable");
142 mem->dimm_width = fdtdec_get_int(blob, node,
143 "fsp,dimm-width",
Bin Meng497c5162017-05-31 01:04:14 -0700144 DIMM_WIDTH_X8);
Andrew Bradford74fdb582015-08-07 08:36:35 -0400145 mem->dimm_density = fdtdec_get_int(blob, node,
146 "fsp,dimm-density",
Bin Meng497c5162017-05-31 01:04:14 -0700147 DIMM_DENSITY_2GBIT);
Andrew Bradford74fdb582015-08-07 08:36:35 -0400148 mem->dimm_bus_width = fdtdec_get_int(blob, node,
Bin Meng497c5162017-05-31 01:04:14 -0700149 "fsp,dimm-bus-width",
150 DIMM_BUS_WIDTH_64BITS);
Andrew Bradford74fdb582015-08-07 08:36:35 -0400151 mem->dimm_sides = fdtdec_get_int(blob, node,
152 "fsp,dimm-sides",
Bin Meng497c5162017-05-31 01:04:14 -0700153 DIMM_SIDES_1RANKS);
Andrew Bradford74fdb582015-08-07 08:36:35 -0400154 mem->dimm_tcl = fdtdec_get_int(blob, node,
155 "fsp,dimm-tcl", 0x09);
156 mem->dimm_trpt_rcd = fdtdec_get_int(blob, node,
157 "fsp,dimm-trpt-rcd", 0x09);
158 mem->dimm_twr = fdtdec_get_int(blob, node,
Bin Meng497c5162017-05-31 01:04:14 -0700159 "fsp,dimm-twr", 0x0a);
Andrew Bradford74fdb582015-08-07 08:36:35 -0400160 mem->dimm_twtr = fdtdec_get_int(blob, node,
161 "fsp,dimm-twtr", 0x05);
162 mem->dimm_trrd = fdtdec_get_int(blob, node,
163 "fsp,dimm-trrd", 0x04);
164 mem->dimm_trtp = fdtdec_get_int(blob, node,
165 "fsp,dimm-trtp", 0x05);
166 mem->dimm_tfaw = fdtdec_get_int(blob, node,
167 "fsp,dimm-tfaw", 0x14);
168 }
169 }
Simon Glass4a56f102015-01-27 22:13:47 -0700170}