Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 1 | /* |
SRICHARAN R | 99c43be | 2012-03-12 02:25:45 +0000 | [diff] [blame] | 2 | * Timing and Organization details of the ddr device parts used in OMAP5 |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 3 | * EVM |
| 4 | * |
| 5 | * (C) Copyright 2010 |
| 6 | * Texas Instruments, <www.ti.com> |
| 7 | * |
| 8 | * Aneesh V <aneesh@ti.com> |
| 9 | * Sricharan R <r.sricharan@ti.com> |
| 10 | * |
| 11 | * See file CREDITS for list of people who contributed to this |
| 12 | * project. |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or |
| 15 | * modify it under the terms of the GNU General Public License as |
| 16 | * published by the Free Software Foundation; either version 2 of |
| 17 | * the License, or (at your option) any later version. |
| 18 | * |
| 19 | * This program is distributed in the hope that it will be useful, |
| 20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 22 | * GNU General Public License for more details. |
| 23 | * |
| 24 | * You should have received a copy of the GNU General Public License |
| 25 | * along with this program; if not, write to the Free Software |
| 26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 27 | * MA 02111-1307 USA |
| 28 | */ |
| 29 | |
| 30 | #include <asm/emif.h> |
| 31 | #include <asm/arch/sys_proto.h> |
| 32 | |
| 33 | /* |
| 34 | * This file provides details of the LPDDR2 SDRAM parts used on OMAP5 |
| 35 | * EVM. Since the parts used and geometry are identical for |
| 36 | * evm for a given OMAP5 revision, this information is kept |
| 37 | * here instead of being in board directory. However the key functions |
| 38 | * exported are weakly linked so that they can be over-ridden in the board |
| 39 | * directory if there is a OMAP5 board in the future that uses a different |
| 40 | * memory device or geometry. |
| 41 | * |
| 42 | * For any new board with different memory devices over-ride one or more |
| 43 | * of the following functions as per the CONFIG flags you intend to enable: |
| 44 | * - emif_get_reg_dump() |
| 45 | * - emif_get_dmm_regs() |
| 46 | * - emif_get_device_details() |
| 47 | * - emif_get_device_timings() |
| 48 | */ |
| 49 | |
| 50 | #ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS |
SRICHARAN R | 99c43be | 2012-03-12 02:25:45 +0000 | [diff] [blame] | 51 | const struct emif_regs emif_regs_532_mhz_2cs = { |
SRICHARAN R | 3d53496 | 2012-03-12 02:25:37 +0000 | [diff] [blame] | 52 | .sdram_config_init = 0x80800EBA, |
| 53 | .sdram_config = 0x808022BA, |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 54 | .ref_ctrl = 0x0000081A, |
| 55 | .sdram_tim1 = 0x772F6873, |
SRICHARAN R | 3d53496 | 2012-03-12 02:25:37 +0000 | [diff] [blame] | 56 | .sdram_tim2 = 0x304a129a, |
| 57 | .sdram_tim3 = 0x02f7e45f, |
| 58 | .read_idle_ctrl = 0x00050000, |
| 59 | .zq_config = 0x000b3215, |
| 60 | .temp_alert_config = 0x08000a05, |
| 61 | .emif_ddr_phy_ctlr_1_init = 0x0E28420d, |
| 62 | .emif_ddr_phy_ctlr_1 = 0x0E28420d, |
| 63 | .emif_ddr_ext_phy_ctrl_1 = 0x04020080, |
| 64 | .emif_ddr_ext_phy_ctrl_2 = 0x28C518A3, |
| 65 | .emif_ddr_ext_phy_ctrl_3 = 0x518A3146, |
| 66 | .emif_ddr_ext_phy_ctrl_4 = 0x0014628C, |
| 67 | .emif_ddr_ext_phy_ctrl_5 = 0x04010040 |
| 68 | }; |
| 69 | |
SRICHARAN R | 99c43be | 2012-03-12 02:25:45 +0000 | [diff] [blame] | 70 | const struct emif_regs emif_regs_266_mhz_2cs = { |
SRICHARAN R | 3d53496 | 2012-03-12 02:25:37 +0000 | [diff] [blame] | 71 | .sdram_config_init = 0x80800EBA, |
| 72 | .sdram_config = 0x808022BA, |
| 73 | .ref_ctrl = 0x0000040D, |
| 74 | .sdram_tim1 = 0x2A86B419, |
| 75 | .sdram_tim2 = 0x1025094A, |
| 76 | .sdram_tim3 = 0x026BA22F, |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 77 | .read_idle_ctrl = 0x00050000, |
SRICHARAN R | 3d53496 | 2012-03-12 02:25:37 +0000 | [diff] [blame] | 78 | .zq_config = 0x000b3215, |
| 79 | .temp_alert_config = 0x08000a05, |
| 80 | .emif_ddr_phy_ctlr_1_init = 0x0E28420d, |
| 81 | .emif_ddr_phy_ctlr_1 = 0x0E28420d, |
| 82 | .emif_ddr_ext_phy_ctrl_1 = 0x04020080, |
| 83 | .emif_ddr_ext_phy_ctrl_2 = 0x0A414829, |
| 84 | .emif_ddr_ext_phy_ctrl_3 = 0x14829052, |
| 85 | .emif_ddr_ext_phy_ctrl_4 = 0x000520A4, |
| 86 | .emif_ddr_ext_phy_ctrl_5 = 0x04010040 |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 87 | }; |
| 88 | |
SRICHARAN R | 3d53496 | 2012-03-12 02:25:37 +0000 | [diff] [blame] | 89 | const struct dmm_lisa_map_regs lisa_map_4G_x_2_x_2 = { |
| 90 | .dmm_lisa_map_0 = 0x0, |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 91 | .dmm_lisa_map_1 = 0, |
| 92 | .dmm_lisa_map_2 = 0, |
SRICHARAN R | 3d53496 | 2012-03-12 02:25:37 +0000 | [diff] [blame] | 93 | .dmm_lisa_map_3 = 0x80740300 |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 94 | }; |
| 95 | |
SRICHARAN R | 3d53496 | 2012-03-12 02:25:37 +0000 | [diff] [blame] | 96 | const u32 ext_phy_ctrl_const_base[EMIF_EXT_PHY_CTRL_CONST_REG] = { |
| 97 | 0x01004010, |
| 98 | 0x00001004, |
| 99 | 0x04010040, |
| 100 | 0x01004010, |
| 101 | 0x00001004, |
| 102 | 0x00000000, |
| 103 | 0x00000000, |
| 104 | 0x00000000, |
| 105 | 0x80080080, |
| 106 | 0x00800800, |
| 107 | 0x08102040, |
| 108 | 0x00000001, |
| 109 | 0x540A8150, |
| 110 | 0xA81502a0, |
| 111 | 0x002A0540, |
| 112 | 0x00000000, |
| 113 | 0x00000000, |
| 114 | 0x00000000, |
| 115 | 0x00000077 |
| 116 | }; |
| 117 | |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 118 | static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs) |
| 119 | { |
SRICHARAN R | 99c43be | 2012-03-12 02:25:45 +0000 | [diff] [blame] | 120 | *regs = &emif_regs_532_mhz_2cs; |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 121 | } |
| 122 | void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) |
| 123 | __attribute__((weak, alias("emif_get_reg_dump_sdp"))); |
| 124 | |
| 125 | static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs |
| 126 | **dmm_lisa_regs) |
| 127 | { |
SRICHARAN R | 3d53496 | 2012-03-12 02:25:37 +0000 | [diff] [blame] | 128 | *dmm_lisa_regs = &lisa_map_4G_x_2_x_2; |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 129 | } |
| 130 | |
| 131 | void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) |
| 132 | __attribute__((weak, alias("emif_get_dmm_regs_sdp"))); |
| 133 | |
| 134 | #else |
| 135 | |
SRICHARAN R | 99c43be | 2012-03-12 02:25:45 +0000 | [diff] [blame] | 136 | static const struct lpddr2_device_details dev_4G_S4_details = { |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 137 | .type = LPDDR2_TYPE_S4, |
| 138 | .density = LPDDR2_DENSITY_4Gb, |
| 139 | .io_width = LPDDR2_IO_WIDTH_32, |
SRICHARAN R | 99c43be | 2012-03-12 02:25:45 +0000 | [diff] [blame] | 140 | .manufacturer = LPDDR2_MANUFACTURER_SAMSUNG |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 141 | }; |
| 142 | |
| 143 | static void emif_get_device_details_sdp(u32 emif_nr, |
| 144 | struct lpddr2_device_details *cs0_device_details, |
| 145 | struct lpddr2_device_details *cs1_device_details) |
| 146 | { |
| 147 | /* EMIF1 & EMIF2 have identical configuration */ |
SRICHARAN R | 99c43be | 2012-03-12 02:25:45 +0000 | [diff] [blame] | 148 | *cs0_device_details = dev_4G_S4_details; |
| 149 | *cs1_device_details = dev_4G_S4_details; |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 150 | } |
| 151 | |
| 152 | void emif_get_device_details(u32 emif_nr, |
| 153 | struct lpddr2_device_details *cs0_device_details, |
| 154 | struct lpddr2_device_details *cs1_device_details) |
| 155 | __attribute__((weak, alias("emif_get_device_details_sdp"))); |
| 156 | |
| 157 | #endif /* CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS */ |
| 158 | |
| 159 | #ifndef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS |
| 160 | static const struct lpddr2_ac_timings timings_jedec_532_mhz = { |
| 161 | .max_freq = 532000000, |
| 162 | .RL = 8, |
| 163 | .tRPab = 21, |
| 164 | .tRCD = 18, |
| 165 | .tWR = 15, |
| 166 | .tRASmin = 42, |
| 167 | .tRRD = 10, |
| 168 | .tWTRx2 = 15, |
| 169 | .tXSR = 140, |
| 170 | .tXPx2 = 15, |
| 171 | .tRFCab = 130, |
| 172 | .tRTPx2 = 15, |
| 173 | .tCKE = 3, |
| 174 | .tCKESR = 15, |
| 175 | .tZQCS = 90, |
| 176 | .tZQCL = 360, |
| 177 | .tZQINIT = 1000, |
| 178 | .tDQSCKMAXx2 = 11, |
| 179 | .tRASmax = 70, |
| 180 | .tFAW = 50 |
| 181 | }; |
| 182 | |
SRICHARAN R | 99c43be | 2012-03-12 02:25:45 +0000 | [diff] [blame] | 183 | static const struct lpddr2_min_tck min_tck = { |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 184 | .tRL = 3, |
| 185 | .tRP_AB = 3, |
| 186 | .tRCD = 3, |
| 187 | .tWR = 3, |
| 188 | .tRAS_MIN = 3, |
| 189 | .tRRD = 2, |
| 190 | .tWTR = 2, |
| 191 | .tXP = 2, |
| 192 | .tRTP = 2, |
| 193 | .tCKE = 3, |
| 194 | .tCKESR = 3, |
| 195 | .tFAW = 8 |
| 196 | }; |
| 197 | |
SRICHARAN R | 99c43be | 2012-03-12 02:25:45 +0000 | [diff] [blame] | 198 | static const struct lpddr2_ac_timings *ac_timings[MAX_NUM_SPEEDBINS] = { |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 199 | &timings_jedec_532_mhz |
| 200 | }; |
| 201 | |
SRICHARAN R | 99c43be | 2012-03-12 02:25:45 +0000 | [diff] [blame] | 202 | static const struct lpddr2_device_timings dev_4G_S4_timings = { |
| 203 | .ac_timings = ac_timings, |
| 204 | .min_tck = &min_tck, |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 205 | }; |
| 206 | |
| 207 | void emif_get_device_timings_sdp(u32 emif_nr, |
| 208 | const struct lpddr2_device_timings **cs0_device_timings, |
| 209 | const struct lpddr2_device_timings **cs1_device_timings) |
| 210 | { |
| 211 | /* Identical devices on EMIF1 & EMIF2 */ |
SRICHARAN R | 99c43be | 2012-03-12 02:25:45 +0000 | [diff] [blame] | 212 | *cs0_device_timings = &dev_4G_S4_timings; |
| 213 | *cs1_device_timings = &dev_4G_S4_timings; |
Sricharan | 62a8650 | 2011-11-15 09:50:00 -0500 | [diff] [blame] | 214 | } |
| 215 | |
| 216 | void emif_get_device_timings(u32 emif_nr, |
| 217 | const struct lpddr2_device_timings **cs0_device_timings, |
| 218 | const struct lpddr2_device_timings **cs1_device_timings) |
| 219 | __attribute__((weak, alias("emif_get_device_timings_sdp"))); |
| 220 | |
| 221 | #endif /* CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS */ |