blob: 8f9315c0201c93867baeccfdafcab054a2e64e38 [file] [log] [blame]
Matt Porter57da6662013-03-15 10:07:04 +00001/*
2 * hardware_ti814x.h
3 *
4 * TI814x hardware specific header
5 *
6 * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#ifndef __AM33XX_HARDWARE_TI814X_H
20#define __AM33XX_HARDWARE_TI814X_H
21
Matt Porter691fbe32013-03-15 10:07:06 +000022/* Module base addresses */
23
24/* UART Base Address */
25#define UART0_BASE 0x48020000
26
27/* Watchdog Timer */
28#define WDT_BASE 0x481C7000
29
30/* Control Module Base Address */
31#define CTRL_BASE 0x48140000
Matt Porterd4f24092013-03-20 05:38:11 +000032#define CTRL_DEVICE_BASE 0x48140600
Matt Porter691fbe32013-03-15 10:07:06 +000033
34/* PRCM Base Address */
35#define PRCM_BASE 0x48180000
36
37/* PLL Subsystem Base Address */
38#define PLL_SUBSYS_BASE 0x481C5000
39
Matt Porter57da6662013-03-15 10:07:04 +000040/* VTP Base address */
41#define VTP0_CTRL_ADDR 0x48140E0C
42
43/* DDR Base address */
44#define DDR_PHY_CMD_ADDR 0x47C0C400
45#define DDR_PHY_DATA_ADDR 0x47C0C4C8
46#define DDR_DATA_REGS_NR 4
47
Matt Porter691fbe32013-03-15 10:07:06 +000048/* CPSW Config space */
49#define CPSW_MDIO_BASE 0x4A100800
50
51/* RTC base address */
52#define RTC_BASE 0x480C0000
53
Matt Porter57da6662013-03-15 10:07:04 +000054#endif /* __AM33XX_HARDWARE_TI814X_H */