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Tom Rini85554e52017-05-16 14:46:38 -04001/*
2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/pinctrl/omap.h>
9
10/ {
11 compatible = "ti,dm816";
12 interrupt-parent = <&intc>;
13 #address-cells = <1>;
14 #size-cells = <1>;
15 chosen { };
16
17 aliases {
18 i2c0 = &i2c1;
19 i2c1 = &i2c2;
20 serial0 = &uart1;
21 serial1 = &uart2;
22 serial2 = &uart3;
23 ethernet0 = &eth0;
24 ethernet1 = &eth1;
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30 cpu@0 {
31 compatible = "arm,cortex-a8";
32 device_type = "cpu";
33 reg = <0>;
34 };
35 };
36
37 pmu {
38 compatible = "arm,cortex-a8-pmu";
39 interrupts = <3>;
40 };
41
42 /*
43 * The soc node represents the soc top level view. It is used for IPs
44 * that are not memory mapped in the MPU view or for the MPU itself.
45 */
46 soc {
47 compatible = "ti,omap-infra";
48 mpu {
49 compatible = "ti,omap3-mpu";
50 ti,hwmods = "mpu";
51 };
52 };
53
54 /*
55 * XXX: Use a flat representation of the dm816x interconnect.
56 * The real dm816x interconnect network is quite complex. Since
57 * it will not bring real advantage to represent that in DT
58 * for the moment, just use a fake OCP bus entry to represent
59 * the whole bus hierarchy.
60 */
61 ocp {
62 compatible = "simple-bus";
63 reg = <0x44000000 0x10000>;
64 interrupts = <9 10>;
65 #address-cells = <1>;
66 #size-cells = <1>;
67 ranges;
68
69 prcm: prcm@48180000 {
70 compatible = "ti,dm816-prcm";
71 reg = <0x48180000 0x4000>;
72
73 prcm_clocks: clocks {
74 #address-cells = <1>;
75 #size-cells = <0>;
76 };
77
78 prcm_clockdomains: clockdomains {
79 };
80 };
81
82 scrm: scrm@48140000 {
83 compatible = "ti,dm816-scrm", "simple-bus";
84 reg = <0x48140000 0x21000>;
85 #address-cells = <1>;
86 #size-cells = <1>;
87 #pinctrl-cells = <1>;
88 ranges = <0 0x48140000 0x21000>;
89
90 dm816x_pinmux: pinmux@800 {
91 compatible = "pinctrl-single";
92 reg = <0x800 0x50a>;
Tom Rini85554e52017-05-16 14:46:38 -040093 #pinctrl-cells = <1>;
94 pinctrl-single,register-width = <16>;
95 pinctrl-single,function-mask = <0xf>;
96 };
97
98 /* Device Configuration Registers */
99 scm_conf: syscon@600 {
100 compatible = "syscon", "simple-bus";
101 reg = <0x600 0x110>;
102 #address-cells = <1>;
103 #size-cells = <1>;
104 ranges = <0 0x600 0x110>;
105
106 usb_phy0: usb-phy@20 {
107 compatible = "ti,dm8168-usb-phy";
108 reg = <0x20 0x8>;
109 reg-names = "phy";
110 clocks = <&main_fapll 6>;
111 clock-names = "refclk";
112 #phy-cells = <0>;
113 syscon = <&scm_conf>;
114 };
115
116 usb_phy1: usb-phy@28 {
117 compatible = "ti,dm8168-usb-phy";
118 reg = <0x28 0x8>;
119 reg-names = "phy";
120 clocks = <&main_fapll 6>;
121 clock-names = "refclk";
122 #phy-cells = <0>;
123 syscon = <&scm_conf>;
124 };
125 };
126
127 scrm_clocks: clocks {
Tom Rini85554e52017-05-16 14:46:38 -0400128 };
129
130 scrm_clockdomains: clockdomains {
131 };
132 };
133
134 edma: edma@49000000 {
135 compatible = "ti,edma3";
136 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
137 reg = <0x49000000 0x10000>,
138 <0x44e10f90 0x40>;
139 interrupts = <12 13 14>;
140 #dma-cells = <1>;
141 };
142
143 elm: elm@48080000 {
144 compatible = "ti,816-elm";
145 ti,hwmods = "elm";
146 reg = <0x48080000 0x2000>;
147 interrupts = <4>;
148 };
149
150 gpio1: gpio@48032000 {
151 compatible = "ti,omap4-gpio";
152 ti,hwmods = "gpio1";
153 ti,gpio-always-on;
154 reg = <0x48032000 0x1000>;
155 interrupts = <96>;
156 gpio-controller;
157 #gpio-cells = <2>;
158 interrupt-controller;
159 #interrupt-cells = <2>;
160 };
161
162 gpio2: gpio@4804c000 {
163 compatible = "ti,omap4-gpio";
164 ti,hwmods = "gpio2";
165 ti,gpio-always-on;
166 reg = <0x4804c000 0x1000>;
167 interrupts = <98>;
168 gpio-controller;
169 #gpio-cells = <2>;
170 interrupt-controller;
171 #interrupt-cells = <2>;
172 };
173
174 gpmc: gpmc@50000000 {
175 compatible = "ti,am3352-gpmc";
176 ti,hwmods = "gpmc";
177 reg = <0x50000000 0x2000>;
178 #address-cells = <2>;
179 #size-cells = <1>;
180 interrupts = <100>;
181 dmas = <&edma 52>;
182 dma-names = "rxtx";
183 gpmc,num-cs = <6>;
184 gpmc,num-waitpins = <2>;
185 interrupt-controller;
186 #interrupt-cells = <2>;
187 gpio-controller;
188 #gpio-cells = <2>;
189 };
190
191 i2c1: i2c@48028000 {
192 compatible = "ti,omap4-i2c";
193 ti,hwmods = "i2c1";
194 reg = <0x48028000 0x1000>;
195 #address-cells = <1>;
196 #size-cells = <0>;
197 interrupts = <70>;
198 dmas = <&edma 58 &edma 59>;
199 dma-names = "tx", "rx";
200 };
201
202 i2c2: i2c@4802a000 {
203 compatible = "ti,omap4-i2c";
204 ti,hwmods = "i2c2";
205 reg = <0x4802a000 0x1000>;
206 #address-cells = <1>;
207 #size-cells = <0>;
208 interrupts = <71>;
209 dmas = <&edma 60 &edma 61>;
210 dma-names = "tx", "rx";
211 };
212
213 intc: interrupt-controller@48200000 {
214 compatible = "ti,dm816-intc";
215 interrupt-controller;
216 #interrupt-cells = <1>;
217 reg = <0x48200000 0x1000>;
218 };
219
220 rtc: rtc@480c0000 {
221 compatible = "ti,am3352-rtc", "ti,da830-rtc";
222 reg = <0x480c0000 0x1000>;
223 interrupts = <75 76>;
224 ti,hwmods = "rtc";
225 };
226
227 mailbox: mailbox@480c8000 {
228 compatible = "ti,omap4-mailbox";
229 reg = <0x480c8000 0x2000>;
230 interrupts = <77>;
231 ti,hwmods = "mailbox";
232 #mbox-cells = <1>;
233 ti,mbox-num-users = <4>;
234 ti,mbox-num-fifos = <12>;
235 mbox_dsp: mbox_dsp {
236 ti,mbox-tx = <3 0 0>;
237 ti,mbox-rx = <0 0 0>;
238 };
239 };
240
241 spinbox: spinbox@480ca000 {
242 compatible = "ti,omap4-hwspinlock";
243 reg = <0x480ca000 0x2000>;
244 ti,hwmods = "spinbox";
245 #hwlock-cells = <1>;
246 };
247
248 mdio: mdio@4a100800 {
249 compatible = "ti,davinci_mdio";
250 #address-cells = <1>;
251 #size-cells = <0>;
252 reg = <0x4a100800 0x100>;
253 ti,hwmods = "davinci_mdio";
254 bus_freq = <1000000>;
255 phy0: ethernet-phy@0 {
256 reg = <1>;
257 };
258 phy1: ethernet-phy@1 {
259 reg = <2>;
260 };
261 };
262
263 eth0: ethernet@4a100000 {
264 compatible = "ti,dm816-emac";
265 ti,hwmods = "emac0";
266 reg = <0x4a100000 0x800
267 0x4a100900 0x3700>;
268 clocks = <&sysclk24_ck>;
269 syscon = <&scm_conf>;
270 ti,davinci-ctrl-reg-offset = <0>;
271 ti,davinci-ctrl-mod-reg-offset = <0x900>;
272 ti,davinci-ctrl-ram-offset = <0x2000>;
273 ti,davinci-ctrl-ram-size = <0x2000>;
274 interrupts = <40 41 42 43>;
275 phy-handle = <&phy0>;
276 };
277
278 eth1: ethernet@4a120000 {
279 compatible = "ti,dm816-emac";
280 ti,hwmods = "emac1";
281 reg = <0x4a120000 0x4000>;
282 clocks = <&sysclk24_ck>;
283 syscon = <&scm_conf>;
284 ti,davinci-ctrl-reg-offset = <0>;
285 ti,davinci-ctrl-mod-reg-offset = <0x900>;
286 ti,davinci-ctrl-ram-offset = <0x2000>;
287 ti,davinci-ctrl-ram-size = <0x2000>;
288 interrupts = <44 45 46 47>;
289 phy-handle = <&phy1>;
290 };
291
292 mcspi1: spi@48030000 {
293 compatible = "ti,omap4-mcspi";
294 reg = <0x48030000 0x1000>;
295 #address-cells = <1>;
296 #size-cells = <0>;
297 interrupts = <65>;
298 ti,spi-num-cs = <4>;
299 ti,hwmods = "mcspi1";
300 dmas = <&edma 16 &edma 17
301 &edma 18 &edma 19
302 &edma 20 &edma 21
303 &edma 22 &edma 23>;
304 dma-names = "tx0", "rx0", "tx1", "rx1",
305 "tx2", "rx2", "tx3", "rx3";
306 };
307
308 mmc1: mmc@48060000 {
309 compatible = "ti,omap4-hsmmc";
310 reg = <0x48060000 0x11000>;
311 ti,hwmods = "mmc1";
312 interrupts = <64>;
313 dmas = <&edma 24 &edma 25>;
314 dma-names = "tx", "rx";
315 };
316
317 timer1: timer@4802e000 {
318 compatible = "ti,dm816-timer";
319 reg = <0x4802e000 0x2000>;
320 interrupts = <67>;
321 ti,hwmods = "timer1";
322 ti,timer-alwon;
323 };
324
325 timer2: timer@48040000 {
326 compatible = "ti,dm816-timer";
327 reg = <0x48040000 0x2000>;
328 interrupts = <68>;
329 ti,hwmods = "timer2";
330 };
331
332 timer3: timer@48042000 {
333 compatible = "ti,dm816-timer";
334 reg = <0x48042000 0x2000>;
335 interrupts = <69>;
336 ti,hwmods = "timer3";
337 };
338
339 timer4: timer@48044000 {
340 compatible = "ti,dm816-timer";
341 reg = <0x48044000 0x2000>;
342 interrupts = <92>;
343 ti,hwmods = "timer4";
344 ti,timer-pwm;
345 };
346
347 timer5: timer@48046000 {
348 compatible = "ti,dm816-timer";
349 reg = <0x48046000 0x2000>;
350 interrupts = <93>;
351 ti,hwmods = "timer5";
352 ti,timer-pwm;
353 };
354
355 timer6: timer@48048000 {
356 compatible = "ti,dm816-timer";
357 reg = <0x48048000 0x2000>;
358 interrupts = <94>;
359 ti,hwmods = "timer6";
360 ti,timer-pwm;
361 };
362
363 timer7: timer@4804a000 {
364 compatible = "ti,dm816-timer";
365 reg = <0x4804a000 0x2000>;
366 interrupts = <95>;
367 ti,hwmods = "timer7";
368 ti,timer-pwm;
369 };
370
371 uart1: uart@48020000 {
372 compatible = "ti,am3352-uart", "ti,omap3-uart";
373 ti,hwmods = "uart1";
374 reg = <0x48020000 0x2000>;
375 clock-frequency = <48000000>;
376 interrupts = <72>;
377 dmas = <&edma 26 &edma 27>;
378 dma-names = "tx", "rx";
379 };
380
381 uart2: uart@48022000 {
382 compatible = "ti,am3352-uart", "ti,omap3-uart";
383 ti,hwmods = "uart2";
384 reg = <0x48022000 0x2000>;
385 clock-frequency = <48000000>;
386 interrupts = <73>;
387 dmas = <&edma 28 &edma 29>;
388 dma-names = "tx", "rx";
389 };
390
391 uart3: uart@48024000 {
392 compatible = "ti,am3352-uart", "ti,omap3-uart";
393 ti,hwmods = "uart3";
394 reg = <0x48024000 0x2000>;
395 clock-frequency = <48000000>;
396 interrupts = <74>;
397 dmas = <&edma 30 &edma 31>;
398 dma-names = "tx", "rx";
399 };
400
401 /* NOTE: USB needs a transceiver driver for phys to work */
402 usb: usb_otg_hs@47401000 {
403 compatible = "ti,am33xx-usb";
404 reg = <0x47401000 0x400000>;
405 ranges;
406 #address-cells = <1>;
407 #size-cells = <1>;
408 ti,hwmods = "usb_otg_hs";
409
410 usb0: usb@47401000 {
411 compatible = "ti,musb-dm816";
412 reg = <0x47401400 0x400
413 0x47401000 0x200>;
414 reg-names = "mc", "control";
415 interrupts = <18>;
416 interrupt-names = "mc";
417 dr_mode = "host";
418 interface-type = <0>;
419 phys = <&usb_phy0>;
420 phy-names = "usb2-phy";
421 mentor,multipoint = <1>;
422 mentor,num-eps = <16>;
423 mentor,ram-bits = <12>;
424 mentor,power = <500>;
425
426 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
427 &cppi41dma 2 0 &cppi41dma 3 0
428 &cppi41dma 4 0 &cppi41dma 5 0
429 &cppi41dma 6 0 &cppi41dma 7 0
430 &cppi41dma 8 0 &cppi41dma 9 0
431 &cppi41dma 10 0 &cppi41dma 11 0
432 &cppi41dma 12 0 &cppi41dma 13 0
433 &cppi41dma 14 0 &cppi41dma 0 1
434 &cppi41dma 1 1 &cppi41dma 2 1
435 &cppi41dma 3 1 &cppi41dma 4 1
436 &cppi41dma 5 1 &cppi41dma 6 1
437 &cppi41dma 7 1 &cppi41dma 8 1
438 &cppi41dma 9 1 &cppi41dma 10 1
439 &cppi41dma 11 1 &cppi41dma 12 1
440 &cppi41dma 13 1 &cppi41dma 14 1>;
441 dma-names =
442 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
443 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
444 "rx14", "rx15",
445 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
446 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
447 "tx14", "tx15";
448 };
449
450 usb1: usb@47401800 {
451 compatible = "ti,musb-dm816";
452 reg = <0x47401c00 0x400
453 0x47401800 0x200>;
454 reg-names = "mc", "control";
455 interrupts = <19>;
456 interrupt-names = "mc";
457 dr_mode = "host";
458 interface-type = <0>;
459 phys = <&usb_phy1>;
460 phy-names = "usb2-phy";
461 mentor,multipoint = <1>;
462 mentor,num-eps = <16>;
463 mentor,ram-bits = <12>;
464 mentor,power = <500>;
465
466 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
467 &cppi41dma 17 0 &cppi41dma 18 0
468 &cppi41dma 19 0 &cppi41dma 20 0
469 &cppi41dma 21 0 &cppi41dma 22 0
470 &cppi41dma 23 0 &cppi41dma 24 0
471 &cppi41dma 25 0 &cppi41dma 26 0
472 &cppi41dma 27 0 &cppi41dma 28 0
473 &cppi41dma 29 0 &cppi41dma 15 1
474 &cppi41dma 16 1 &cppi41dma 17 1
475 &cppi41dma 18 1 &cppi41dma 19 1
476 &cppi41dma 20 1 &cppi41dma 21 1
477 &cppi41dma 22 1 &cppi41dma 23 1
478 &cppi41dma 24 1 &cppi41dma 25 1
479 &cppi41dma 26 1 &cppi41dma 27 1
480 &cppi41dma 28 1 &cppi41dma 29 1>;
481 dma-names =
482 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
483 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
484 "rx14", "rx15",
485 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
486 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
487 "tx14", "tx15";
488 };
489
490 cppi41dma: dma-controller@47402000 {
491 compatible = "ti,am3359-cppi41";
492 reg = <0x47400000 0x1000
493 0x47402000 0x1000
494 0x47403000 0x1000
495 0x47404000 0x4000>;
496 reg-names = "glue", "controller", "scheduler", "queuemgr";
497 interrupts = <17>;
498 interrupt-names = "glue";
499 #dma-cells = <2>;
500 #dma-channels = <30>;
501 #dma-requests = <256>;
502 };
503 };
504
505 wd_timer2: wd_timer@480c2000 {
506 compatible = "ti,omap3-wdt";
507 ti,hwmods = "wd_timer";
508 reg = <0x480c2000 0x1000>;
509 interrupts = <0>;
510 };
511 };
512};
513
514#include "dm816x-clocks.dtsi"