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Daniel Hellstrome045a4c2008-03-26 23:34:47 +01001/* Configuration header file for Gaisler Research AB's Template
2 * design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS
3 * Development board Stratix II edition, with the FPGA device
4 * EP2S60.
5 *
6 * (C) Copyright 2003-2005
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
9 * (C) Copyright 2008
10 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
11 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020012 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrome045a4c2008-03-26 23:34:47 +010013 */
14
15#ifndef __CONFIG_H__
16#define __CONFIG_H__
17
18/*
19 * High Level Configuration Options
20 * (easy to change)
21 */
22
23#define CONFIG_LEON3 /* This is an LEON3 CPU */
24#define CONFIG_LEON 1 /* This is an LEON CPU */
25/* Altera NIOS Development board, Stratix II board */
Wolfgang Denka1be4762008-05-20 16:00:29 +020026#define CONFIG_GR_EP2S60 1
Daniel Hellstrome045a4c2008-03-26 23:34:47 +010027
28/* CPU / AMBA BUS configuration */
Wolfgang Denka1be4762008-05-20 16:00:29 +020029#define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +010030
31/* Number of SPARC register windows */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020032#define CONFIG_SYS_SPARC_NWINDOWS 8
Daniel Hellstrome045a4c2008-03-26 23:34:47 +010033
34/* Define this is the GR-2S60-MEZZ mezzanine is available and you
35 * want to use the USB and GRETH functionality of the board
36 */
37#undef GR_2S60_MEZZ
38
39#ifdef GR_2S60_MEZZ
40#define USE_GRETH 1
41#define USE_GRUSB 1
42#endif
43
44/*
45 * Serial console configuration
46 */
47#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020048#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrome045a4c2008-03-26 23:34:47 +010049
50/* Partitions */
51#define CONFIG_DOS_PARTITION
52#define CONFIG_MAC_PARTITION
53#define CONFIG_ISO_PARTITION
54
55/*
56 * Supported commands
57 */
58#include <config_cmd_default.h>
59
60#define CONFIG_CMD_REGINFO
61#define CONFIG_CMD_AMBAPP
62#define CONFIG_CMD_PING
63#define CONFIG_CMD_DIAG
64#define CONFIG_CMD_IRQ
65
66/* USB support */
67#if USE_GRUSB
68#define CONFIG_USB_UHCI
69#define CONFIG_CMD_FAT
70#define CONFIG_CMD_EXT2
71#define CONFIG_CMD_USB
72#define CONFIG_USB_STORAGE
73/* Enable needed helper functions */
Jean-Christophe PLAGNIOL-VILLARD2a7a0312009-05-16 12:14:54 +020074#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +010075#endif
76
77/*
78 * Autobooting
79 */
80#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
81
82#define CONFIG_PREBOOT "echo;" \
83 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
84 "echo"
85
86#undef CONFIG_BOOTARGS
87
88#define CONFIG_EXTRA_ENV_SETTINGS \
89 "netdev=eth0\0" \
90 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
91 "nfsroot=${serverip}:${rootpath}\0" \
92 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
93 "addip=setenv bootargs ${bootargs} " \
94 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
95 ":${hostname}:${netdev}:off panic=1\0" \
96 "flash_nfs=run nfsargs addip;" \
97 "bootm ${kernel_addr}\0" \
98 "flash_self=run ramargs addip;" \
99 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
100 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
101 "scratch=40800000\0" \
Mike Frysingerc3c6bf12011-10-12 19:47:51 +0000102 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100103 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \
104 ""
105
106#define CONFIG_NETMASK 255.255.255.0
107#define CONFIG_GATEWAYIP 192.168.0.1
108#define CONFIG_SERVERIP 192.168.0.20
109#define CONFIG_IPADDR 192.168.0.207
Joe Hershberger257ff782011-10-13 13:03:47 +0000110#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100111#define CONFIG_HOSTNAME ml401
Joe Hershbergere4da2482011-10-13 13:03:48 +0000112#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100113
114#define CONFIG_BOOTCOMMAND "run flash_self"
115
116/* Memory MAP
117 *
118 * Flash:
119 * |--------------------------------|
120 * | 0x00000000 Text & Data & BSS | *
121 * | for Monitor | *
122 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
123 * | UNUSED / Growth | * 256kb
124 * |--------------------------------|
125 * | 0x00050000 Base custom area | *
126 * | kernel / FS | *
127 * | | * Rest of Flash
128 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
129 * | END-0x00008000 Environment | * 32kb
130 * |--------------------------------|
131 *
132 *
133 *
134 * Main Memory:
135 * |--------------------------------|
136 * | UNUSED / scratch area |
137 * | |
138 * | |
139 * | |
140 * | |
141 * |--------------------------------|
142 * | Monitor .Text / .DATA / .BSS | * 512kb
143 * | Relocated! | *
144 * |--------------------------------|
145 * | Monitor Malloc | * 128kb (contains relocated environment)
146 * |--------------------------------|
147 * | Monitor/kernel STACK | * 64kb
148 * |--------------------------------|
149 * | Page Table for MMU systems | * 2k
150 * |--------------------------------|
151 * | PROM Code accessed from Linux | * 6kb-128b
152 * |--------------------------------|
153 * | Global data (avail from kernel)| * 128b
154 * |--------------------------------|
155 *
156 */
157
158/*
159 * Flash configuration (8,16 or 32 MB)
160 * TEXT base always at 0xFFF00000
161 * ENV_ADDR always at 0xFFF40000
162 * FLASH_BASE at 0xFC000000 for 64 MB
163 * 0xFE000000 for 32 MB
164 * 0xFF000000 for 16 MB
165 * 0xFF800000 for 8 MB
166 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200167/*#define CONFIG_SYS_NO_FLASH 1*/
168#define CONFIG_SYS_FLASH_BASE 0x00000000
169#define CONFIG_SYS_FLASH_SIZE 0x00400000 /* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100170
171#define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200172#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
173#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100174
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200175#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
176#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
177#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
178#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
179#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100180
181/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200182#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200183#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200184#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100185/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200186#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100187/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200188#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100189
190/*
191 * Environment settings
192 */
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200193/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200194#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200195/* CONFIG_ENV_ADDR need to be at sector boundary */
196#define CONFIG_ENV_SIZE 0x8000
197#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200198#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100199#define CONFIG_ENV_OVERWRITE 1
200
201/*
202 * Memory map
203 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200204#define CONFIG_SYS_SDRAM_BASE 0x40000000
205#define CONFIG_SYS_SDRAM_SIZE 0x02000000
206#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100207
208/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200209#undef CONFIG_SYS_SRAM_BASE
210#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100211
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200212#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
213#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
214#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100215
Wolfgang Denk0191e472010-10-26 14:34:52 +0200216#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100217
Wolfgang Denk0191e472010-10-26 14:34:52 +0200218#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200219#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100220
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200221#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
222#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100223
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200224#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200225#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
226# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100227#endif
228
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200229#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
230#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
231#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100232
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200233#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
234#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100235
236/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200237#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
238#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100239
240/* make un relocated address from relocated address */
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200241#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100242
243/*
244 * Ethernet configuration uses on board SMC91C111, however if a mezzanine
245 * with a PHY is attached the GRETH can be used on this board.
246 * Define USE_GRETH in order to use the mezzanine provided PHY with the
247 * onchip GRETH network MAC, note that this is not supported by the
248 * template design.
249 */
250#ifndef USE_GRETH
251
252/* USE SMC91C111 MAC */
Ben Warren0fd6aae2009-10-04 22:37:03 -0700253#define CONFIG_SMC91111 1
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100254#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
255#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
256#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
257/*#define CONFIG_SHOW_ACTIVITY*/
258#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
259
260#else
261
262/* USE GRETH Ethernet Driver */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100263#define CONFIG_GRETH 1
264
265/* Default GRETH Ethernet HARDWARE address */
266#define GRETH_HWADDR_0 0x00
267#define GRETH_HWADDR_1 0x00
268#define GRETH_HWADDR_2 0x7a
269#define GRETH_HWADDR_3 0xcc
270#define GRETH_HWADDR_4 0x00
271#define GRETH_HWADDR_5 0x13
272#endif
273
274#define CONFIG_ETHADDR 00:00:7a:cc:00:13
275#define CONFIG_PHY_ADDR 0x00
276
277/*
278 * Miscellaneous configurable options
279 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200280#define CONFIG_SYS_LONGHELP /* undef to save memory */
281#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100282#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200283#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100284#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200285#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100286#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200287#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
288#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
289#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100290
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200291#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
292#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100293
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200294#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100295
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200296#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100297
298/*-----------------------------------------------------------------------
299 * USB stuff
300 *-----------------------------------------------------------------------
301 */
302#define CONFIG_USB_CLOCK 0x0001BBBB
303#define CONFIG_USB_CONFIG 0x00005000
304
305/***** Gaisler GRLIB IP-Cores Config ********/
306
307/* AMBA Plug & Play info display on startup */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200308/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100309
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200310#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100311
312/* See, GRLIB Docs (grip.pdf) on how to set up
313 * These the memory controller registers.
314 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200315#define CONFIG_SYS_GRLIB_MEMCFG1 (0x10f800ff | (1<<11))
316#define CONFIG_SYS_GRLIB_MEMCFG2 0x00000000
317#define CONFIG_SYS_GRLIB_MEMCFG3 0x00000000
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100318
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200319#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11))
320#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x00000000
321#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00000000
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100322
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200323#define CONFIG_SYS_GRLIB_DDR_CFG 0xa900830a
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100324
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200325#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
326#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100327
328/* Calculate scaler register value from default baudrate */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200329#define CONFIG_SYS_GRLIB_APBUART_SCALER \
Daniel Hellstrome045a4c2008-03-26 23:34:47 +0100330 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
331
332/* Identification string */
333#define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60"
334
335/* default kernel command line */
336#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
337
338#endif /* __CONFIG_H */