blob: ea630a43dc7f8cd18ae9d2f38202f8267ddfb74e [file] [log] [blame]
Michal Simeka057d222018-03-28 14:37:47 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * dts file for Xilinx ZynqMP ZCU100 revC
4 *
Michal Simek821e32a2021-05-31 09:50:01 +02005 * (C) Copyright 2016 - 2021, Xilinx, Inc.
Michal Simeka057d222018-03-28 14:37:47 +02006 *
7 * Michal Simek <michal.simek@xilinx.com>
8 * Nathalie Chan King Choy
9 */
10
11/dts-v1/;
12
13#include "zynqmp.dtsi"
Michal Simekdf489262020-01-07 12:43:55 +010014#include "zynqmp-clk-ccf.dtsi"
Michal Simeka057d222018-03-28 14:37:47 +020015#include <dt-bindings/input/input.h>
16#include <dt-bindings/interrupt-controller/irq.h>
17#include <dt-bindings/gpio/gpio.h>
Michal Simekf7b922a2021-05-10 13:14:02 +020018#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
Michal Simeka057d222018-03-28 14:37:47 +020019#include <dt-bindings/phy/phy.h>
20
21/ {
22 model = "ZynqMP ZCU100 RevC";
23 compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
24
25 aliases {
Michal Simeka057d222018-03-28 14:37:47 +020026 i2c0 = &i2c1;
27 rtc0 = &rtc;
28 serial0 = &uart1;
29 serial1 = &uart0;
30 serial2 = &dcc;
31 spi0 = &spi0;
32 spi1 = &spi1;
33 usb0 = &usb0;
34 usb1 = &usb1;
35 mmc0 = &sdhci0;
36 mmc1 = &sdhci1;
37 };
38
39 chosen {
40 bootargs = "earlycon";
41 stdout-path = "serial0:115200n8";
42 };
43
44 memory@0 {
45 device_type = "memory";
46 reg = <0x0 0x0 0x0 0x80000000>;
47 };
48
49 gpio-keys {
50 compatible = "gpio-keys";
Michal Simeka057d222018-03-28 14:37:47 +020051 autorepeat;
52 sw4 {
53 label = "sw4";
54 gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
55 linux,code = <KEY_POWER>;
Sudeep Holla13104ce2018-10-24 12:45:40 +010056 wakeup-source;
Michal Simeka057d222018-03-28 14:37:47 +020057 autorepeat;
58 };
59 };
60
61 iio-hwmon {
62 compatible = "iio-hwmon";
63 io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>,
64 <&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>,
65 <&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>,
66 <&xilinx_ams 9>, <&xilinx_ams 10>,
67 <&xilinx_ams 11>, <&xilinx_ams 12>;
68 };
69
70 leds {
71 compatible = "gpio-leds";
Michal Simek958c0e92020-11-26 14:25:02 +010072 led-ds2 {
Michal Simeka057d222018-03-28 14:37:47 +020073 label = "ds2";
74 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
75 linux,default-trigger = "heartbeat";
76 };
77
Michal Simek958c0e92020-11-26 14:25:02 +010078 led-ds3 {
Michal Simeka057d222018-03-28 14:37:47 +020079 label = "ds3";
80 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
81 linux,default-trigger = "phy0tx"; /* WLAN tx */
82 default-state = "off";
83 };
84
Michal Simek958c0e92020-11-26 14:25:02 +010085 led-ds4 {
Michal Simeka057d222018-03-28 14:37:47 +020086 label = "ds4";
87 gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
88 linux,default-trigger = "phy0rx"; /* WLAN rx */
89 default-state = "off";
90 };
91
Michal Simek958c0e92020-11-26 14:25:02 +010092 led-ds5 {
Michal Simeka057d222018-03-28 14:37:47 +020093 label = "ds5";
94 gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
95 linux,default-trigger = "bluetooth-power";
96 };
97
Michal Simek2ef53362018-11-08 10:06:53 +010098 vbus-det { /* U5 USB5744 VBUS detection via MIO25 */
Michal Simeka057d222018-03-28 14:37:47 +020099 label = "vbus_det";
100 gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
101 default-state = "on";
102 };
103 };
104
105 ltc2954: ltc2954 { /* U7 */
106 compatible = "lltc,ltc2954", "lltc,ltc2952";
Michal Simek1ef91fe2018-07-10 10:18:29 +0200107 status = "disabled";
Michal Simeka057d222018-03-28 14:37:47 +0200108 trigger-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; /* INT line - input */
109 /* If there is HW watchdog on mezzanine this signal should be connected there */
110 watchdog-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; /* MIO on PAD */
111 kill-gpios = <&gpio 34 GPIO_ACTIVE_LOW>; /* KILL signal - output */
112 };
113
114 wmmcsdio_fixed: fixedregulator-mmcsdio {
115 compatible = "regulator-fixed";
116 regulator-name = "wmmcsdio_fixed";
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
119 regulator-always-on;
120 regulator-boot-on;
121 };
122
Michal Simek2ef53362018-11-08 10:06:53 +0100123 sdio_pwrseq: sdio-pwrseq {
Michal Simeka057d222018-03-28 14:37:47 +0200124 compatible = "mmc-pwrseq-simple";
125 reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
Jan Kiszka143c78c2019-01-24 09:28:59 +0100126 post-power-on-delay-ms = <10>;
Michal Simeka057d222018-03-28 14:37:47 +0200127 };
Michal Simek1a3a95a2019-08-26 09:30:34 +0200128
129 ina226 {
130 compatible = "iio-hwmon";
131 io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>;
132 };
Michal Simek958c0e92020-11-26 14:25:02 +0100133
Michal Simek9697c3b2021-05-31 09:56:58 +0200134 si5335_0: si5335_0 { /* clk0_usb - u23 */
Michal Simek958c0e92020-11-26 14:25:02 +0100135 compatible = "fixed-clock";
136 #clock-cells = <0>;
137 clock-frequency = <26000000>;
138 };
139
Michal Simek9697c3b2021-05-31 09:56:58 +0200140 si5335_1: si5335_1 { /* clk1_dp - u23 */
Michal Simek958c0e92020-11-26 14:25:02 +0100141 compatible = "fixed-clock";
142 #clock-cells = <0>;
143 clock-frequency = <27000000>;
144 };
Michal Simeka057d222018-03-28 14:37:47 +0200145};
146
147&dcc {
148 status = "okay";
149};
150
151&gpio {
152 status = "okay";
153 gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
154 "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
155 "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
156 "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
157 "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
158 "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
159 "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
160 "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
161 "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
162 "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
163 "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
164 "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
165 "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
166 "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
167 "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
168 "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
169 "", "",
170 "", "", "", "", "", "", "", "", "", "",
171 "", "", "", "", "", "", "", "", "", "",
172 "", "", "", "", "", "", "", "", "", "",
173 "", "", "", "", "", "", "", "", "", "",
174 "", "", "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "", "", "",
179 "", "", "", "";
180};
181
182&gpu {
183 status = "okay";
184};
185
186&i2c1 {
187 status = "okay";
Michal Simekf7b922a2021-05-10 13:14:02 +0200188 pinctrl-names = "default", "gpio";
189 pinctrl-0 = <&pinctrl_i2c1_default>;
190 pinctrl-1 = <&pinctrl_i2c1_gpio>;
191 scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
192 sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
Michal Simeka057d222018-03-28 14:37:47 +0200193 clock-frequency = <100000>;
194 i2c-mux@75 { /* u11 */
195 compatible = "nxp,pca9548";
196 #address-cells = <1>;
197 #size-cells = <0>;
198 reg = <0x75>;
199 i2csw_0: i2c@0 {
200 #address-cells = <1>;
201 #size-cells = <0>;
202 reg = <0>;
203 label = "LS-I2C0";
204 };
205 i2csw_1: i2c@1 {
206 #address-cells = <1>;
207 #size-cells = <0>;
208 reg = <1>;
209 label = "LS-I2C1";
210 };
211 i2csw_2: i2c@2 {
212 #address-cells = <1>;
213 #size-cells = <0>;
214 reg = <2>;
215 label = "HS-I2C2";
216 };
217 i2csw_3: i2c@3 {
218 #address-cells = <1>;
219 #size-cells = <0>;
220 reg = <3>;
221 label = "HS-I2C3";
222 };
223 i2csw_4: i2c@4 {
224 #address-cells = <1>;
225 #size-cells = <0>;
226 reg = <0x4>;
227
228 pmic: pmic@5e { /* Custom TI PMIC u33 */
229 compatible = "ti,tps65086";
230 reg = <0x5e>;
231 interrupt-parent = <&gpio>;
Michal Simek958c0e92020-11-26 14:25:02 +0100232 interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
Michal Simeka057d222018-03-28 14:37:47 +0200233 #gpio-cells = <2>;
234 gpio-controller;
235 };
236 };
237 i2csw_5: i2c@5 {
238 #address-cells = <1>;
239 #size-cells = <0>;
240 reg = <5>;
241 /* PS_PMBUS */
Michal Simek1a3a95a2019-08-26 09:30:34 +0200242 u35: ina226@40 { /* u35 */
Michal Simeka057d222018-03-28 14:37:47 +0200243 compatible = "ti,ina226";
Michal Simek1a3a95a2019-08-26 09:30:34 +0200244 #io-channel-cells = <1>;
Michal Simeka057d222018-03-28 14:37:47 +0200245 reg = <0x40>;
246 shunt-resistor = <10000>;
247 /* MIO31 is alert which should be routed to PMUFW */
248 };
249 };
250 i2csw_6: i2c@6 {
251 #address-cells = <1>;
252 #size-cells = <0>;
253 reg = <6>;
254 /*
255 * Not Connected
256 */
257 };
258 i2csw_7: i2c@7 {
259 #address-cells = <1>;
260 #size-cells = <0>;
261 reg = <7>;
262 /*
263 * usb5744 (DNP) - U5
264 * 100kHz - this is default freq for us
265 */
266 };
267 };
268};
269
Michal Simekf7b922a2021-05-10 13:14:02 +0200270&pinctrl0 {
271 status = "okay";
272 pinctrl_i2c1_default: i2c1-default {
273 mux {
274 groups = "i2c1_1_grp";
275 function = "i2c1";
276 };
277
278 conf {
279 groups = "i2c1_1_grp";
280 bias-pull-up;
281 slew-rate = <SLEW_RATE_SLOW>;
282 power-source = <IO_STANDARD_LVCMOS18>;
283 };
284 };
285
286 pinctrl_i2c1_gpio: i2c1-gpio {
287 mux {
288 groups = "gpio0_4_grp", "gpio0_5_grp";
289 function = "gpio0";
290 };
291
292 conf {
293 groups = "gpio0_4_grp", "gpio0_5_grp";
294 slew-rate = <SLEW_RATE_SLOW>;
295 power-source = <IO_STANDARD_LVCMOS18>;
296 };
297 };
298
299 pinctrl_sdhci0_default: sdhci0-default {
300 mux {
301 groups = "sdio0_3_grp";
302 function = "sdio0";
303 };
304
305 conf {
306 groups = "sdio0_3_grp";
307 slew-rate = <SLEW_RATE_SLOW>;
308 power-source = <IO_STANDARD_LVCMOS18>;
309 bias-disable;
310 };
311
312 mux-cd {
313 groups = "sdio0_cd_0_grp";
314 function = "sdio0_cd";
315 };
316
317 conf-cd {
318 groups = "sdio0_cd_0_grp";
319 bias-high-impedance;
320 bias-pull-up;
321 slew-rate = <SLEW_RATE_SLOW>;
322 power-source = <IO_STANDARD_LVCMOS18>;
323 };
324 };
325
326 pinctrl_sdhci1_default: sdhci1-default {
327 mux {
328 groups = "sdio1_2_grp";
329 function = "sdio1";
330 };
331
332 conf {
333 groups = "sdio1_2_grp";
334 slew-rate = <SLEW_RATE_SLOW>;
335 power-source = <IO_STANDARD_LVCMOS18>;
336 bias-disable;
337 };
338 };
339
340 pinctrl_spi0_default: spi0-default {
341 mux {
342 groups = "spi0_3_grp";
343 function = "spi0";
344 };
345
346 conf {
347 groups = "spi0_3_grp";
348 bias-disable;
349 slew-rate = <SLEW_RATE_SLOW>;
350 power-source = <IO_STANDARD_LVCMOS18>;
351 };
352
353 mux-cs {
354 groups = "spi0_ss_9_grp";
355 function = "spi0_ss";
356 };
357
358 conf-cs {
359 groups = "spi0_ss_9_grp";
360 bias-disable;
361 };
362
363 };
364
365 pinctrl_spi1_default: spi1-default {
366 mux {
367 groups = "spi1_0_grp";
368 function = "spi1";
369 };
370
371 conf {
372 groups = "spi1_0_grp";
373 bias-disable;
374 slew-rate = <SLEW_RATE_SLOW>;
375 power-source = <IO_STANDARD_LVCMOS18>;
376 };
377
378 mux-cs {
379 groups = "spi1_ss_0_grp";
380 function = "spi1_ss";
381 };
382
383 conf-cs {
384 groups = "spi1_ss_0_grp";
385 bias-disable;
386 };
387
388 };
389
390 pinctrl_uart0_default: uart0-default {
391 mux {
392 groups = "uart0_0_grp";
393 function = "uart0";
394 };
395
396 conf {
397 groups = "uart0_0_grp";
398 slew-rate = <SLEW_RATE_SLOW>;
399 power-source = <IO_STANDARD_LVCMOS18>;
400 };
401
402 conf-rx {
403 pins = "MIO3";
404 bias-high-impedance;
405 };
406
407 conf-tx {
408 pins = "MIO2";
409 bias-disable;
410 };
411 };
412
413 pinctrl_uart1_default: uart1-default {
414 mux {
415 groups = "uart1_0_grp";
416 function = "uart1";
417 };
418
419 conf {
420 groups = "uart1_0_grp";
421 slew-rate = <SLEW_RATE_SLOW>;
422 power-source = <IO_STANDARD_LVCMOS18>;
423 };
424
425 conf-rx {
426 pins = "MIO1";
427 bias-high-impedance;
428 };
429
430 conf-tx {
431 pins = "MIO0";
432 bias-disable;
433 };
434 };
435
436 pinctrl_usb0_default: usb0-default {
437 mux {
438 groups = "usb0_0_grp";
439 function = "usb0";
440 };
441
442 conf {
443 groups = "usb0_0_grp";
444 slew-rate = <SLEW_RATE_SLOW>;
445 power-source = <IO_STANDARD_LVCMOS18>;
446 };
447
448 conf-rx {
449 pins = "MIO52", "MIO53", "MIO55";
450 bias-high-impedance;
451 };
452
453 conf-tx {
454 pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
455 "MIO60", "MIO61", "MIO62", "MIO63";
456 bias-disable;
457 };
458 };
459
460 pinctrl_usb1_default: usb1-default {
461 mux {
462 groups = "usb1_0_grp";
463 function = "usb1";
464 };
465
466 conf {
467 groups = "usb1_0_grp";
468 slew-rate = <SLEW_RATE_SLOW>;
469 power-source = <IO_STANDARD_LVCMOS18>;
470 };
471
472 conf-rx {
473 pins = "MIO64", "MIO65", "MIO67";
474 bias-high-impedance;
475 };
476
477 conf-tx {
478 pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
479 "MIO72", "MIO73", "MIO74", "MIO75";
480 bias-disable;
481 };
482 };
483};
484
Michal Simek93a89f32021-06-01 16:42:50 +0200485&psgtr {
486 status = "okay";
487 /* usb3, dp */
488 clocks = <&si5335_0>, <&si5335_1>;
489 clock-names = "ref0", "ref1";
490};
491
Michal Simeka057d222018-03-28 14:37:47 +0200492&rtc {
493 status = "okay";
494};
495
496/* SD0 only supports 3.3V, no level shifter */
497&sdhci0 {
498 status = "okay";
499 no-1-8-v;
Michal Simeka057d222018-03-28 14:37:47 +0200500 disable-wp;
Michal Simekf7b922a2021-05-10 13:14:02 +0200501 pinctrl-names = "default";
502 pinctrl-0 = <&pinctrl_sdhci0_default>;
Michal Simek3b662642020-07-22 17:42:43 +0200503 xlnx,mio-bank = <0>;
Michal Simeka057d222018-03-28 14:37:47 +0200504};
505
506&sdhci1 {
507 status = "okay";
508 bus-width = <0x4>;
Michal Simekf7b922a2021-05-10 13:14:02 +0200509 pinctrl-names = "default";
510 pinctrl-0 = <&pinctrl_sdhci1_default>;
Michal Simek3b662642020-07-22 17:42:43 +0200511 xlnx,mio-bank = <0>;
Michal Simeka057d222018-03-28 14:37:47 +0200512 non-removable;
513 disable-wp;
514 cap-power-off-card;
515 mmc-pwrseq = <&sdio_pwrseq>;
516 vqmmc-supply = <&wmmcsdio_fixed>;
517 #address-cells = <1>;
518 #size-cells = <0>;
519 wlcore: wifi@2 {
520 compatible = "ti,wl1831";
521 reg = <2>;
522 interrupt-parent = <&gpio>;
523 interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
524 };
525};
526
Michal Simeka057d222018-03-28 14:37:47 +0200527&spi0 { /* Low Speed connector */
528 status = "okay";
529 label = "LS-SPI0";
Michal Simekff629fd2018-05-31 09:50:10 +0200530 num-cs = <1>;
Michal Simekf7b922a2021-05-10 13:14:02 +0200531 pinctrl-names = "default";
532 pinctrl-0 = <&pinctrl_spi0_default>;
Michal Simeka057d222018-03-28 14:37:47 +0200533};
534
535&spi1 { /* High Speed connector */
536 status = "okay";
537 label = "HS-SPI1";
Michal Simekff629fd2018-05-31 09:50:10 +0200538 num-cs = <1>;
Michal Simekf7b922a2021-05-10 13:14:02 +0200539 pinctrl-names = "default";
540 pinctrl-0 = <&pinctrl_spi1_default>;
Michal Simeka057d222018-03-28 14:37:47 +0200541};
542
543&uart0 {
544 status = "okay";
Michal Simekf7b922a2021-05-10 13:14:02 +0200545 pinctrl-names = "default";
546 pinctrl-0 = <&pinctrl_uart0_default>;
Michal Simeka057d222018-03-28 14:37:47 +0200547 bluetooth {
548 compatible = "ti,wl1831-st";
549 enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
550 };
Michal Simeka057d222018-03-28 14:37:47 +0200551};
552
553&uart1 {
554 status = "okay";
Michal Simekf7b922a2021-05-10 13:14:02 +0200555 pinctrl-names = "default";
556 pinctrl-0 = <&pinctrl_uart1_default>;
Michal Simeka057d222018-03-28 14:37:47 +0200557};
558
559/* ULPI SMSC USB3320 */
560&usb0 {
561 status = "okay";
Michal Simekf7b922a2021-05-10 13:14:02 +0200562 pinctrl-names = "default";
563 pinctrl-0 = <&pinctrl_usb0_default>;
Manish Naranif3c63382021-07-14 06:17:19 -0600564 phy-names = "usb3-phy";
565 phys = <&psgtr 2 PHY_TYPE_USB3 0 0>;
Michal Simeka057d222018-03-28 14:37:47 +0200566};
567
568&dwc3_0 {
569 status = "okay";
570 dr_mode = "peripheral";
Michal Simeka057d222018-03-28 14:37:47 +0200571 maximum-speed = "super-speed";
572};
573
574/* ULPI SMSC USB3320 */
575&usb1 {
576 status = "okay";
Michal Simekf7b922a2021-05-10 13:14:02 +0200577 pinctrl-names = "default";
578 pinctrl-0 = <&pinctrl_usb1_default>;
Manish Naranif3c63382021-07-14 06:17:19 -0600579 phy-names = "usb3-phy";
580 phys = <&psgtr 3 PHY_TYPE_USB3 1 0>;
Michal Simeka057d222018-03-28 14:37:47 +0200581};
582
583&dwc3_1 {
584 status = "okay";
585 dr_mode = "host";
Michal Simeka057d222018-03-28 14:37:47 +0200586 maximum-speed = "super-speed";
587};
588
589&watchdog0 {
590 status = "okay";
Michal Simeka057d222018-03-28 14:37:47 +0200591};
592
593&xilinx_ams {
594 status = "okay";
595};
596
597&ams_ps {
598 status = "okay";
Michal Simek958c0e92020-11-26 14:25:02 +0100599};
600
601&zynqmp_dpdma {
602 status = "okay";
603};
604
605&zynqmp_dpsub {
606 status = "okay";
607 phy-names = "dp-phy0", "dp-phy1";
608 phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
609 <&psgtr 0 PHY_TYPE_DP 1 1>;
Michal Simeka057d222018-03-28 14:37:47 +0200610};