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git01.mediatek.com / filogic / uboot / 06aeb26cff2d13382dbfe4901c5038fc93c07746 / . / configs / T2080QDS_defconfig
blob: 1679ef1481fae40ce4642716559cea9ef11f578a [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0xEFF40000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]3CONFIG_ENV_SIZE=0x2000
4CONFIG_ENV_SECT_SIZE=0x20000
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]5CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
Tom Rini2c082ab2021-07-26 21:10:37 -0400[diff] [blame]6CONFIG_FSL_USE_PCA9547_MUX=y
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]7CONFIG_MPC85xx=y
York Sund1a6c0f2016-11-21 12:46:58 -0800[diff] [blame]8CONFIG_TARGET_T2080QDS=y
Jagdish Gediya9892b232018-09-03 21:35:12 +0530[diff] [blame]9CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]10CONFIG_FIT=y
11CONFIG_FIT_VERBOSE=y
12CONFIG_OF_BOARD_SETUP=y
13CONFIG_OF_STDOUT_VIA_ALIAS=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]14CONFIG_BOOTDELAY=10
Mario Six75b23ed2018-03-28 14:38:15 +0200[diff] [blame]15CONFIG_BOARD_EARLY_INIT_R=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]16CONFIG_HUSH_PARSER=y
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]17CONFIG_CMD_IMLS=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]18CONFIG_CMD_GREPENV=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]19CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]20CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]21CONFIG_CMD_USB=y
22CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]23CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]24CONFIG_CMD_PING=y
Siva Durga Prasad Paladugu8e45f1a2018-06-19 12:24:23 +0200[diff] [blame]25CONFIG_MP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]26CONFIG_CMD_EXT2=y
27CONFIG_CMD_FAT=y
Tom Rinic20bb732017-07-22 18:36:16 -0400[diff] [blame]28CONFIG_CMD_MTDPARTS=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]29CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
30CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)"
Jagdish Gediya9892b232018-09-03 21:35:12 +0530[diff] [blame]31CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]32CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]33CONFIG_ENV_IS_IN_FLASH=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]34CONFIG_ENV_ADDR=0xEFF20000
Peng Maf6e7d732019-03-27 09:23:38 +0000[diff] [blame]35CONFIG_DM=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]36CONFIG_FSL_CAAM=y
Tom Rinif7246c22021-08-21 13:50:17 -0400[diff] [blame]37CONFIG_DYNAMIC_DDR_CLK_FREQ=y
Tom Rini468c2d52021-08-21 13:50:18 -0400[diff] [blame]38CONFIG_DDR_ECC=y
39CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]40CONFIG_DM_I2C=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]41CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rinibe94c762021-08-18 23:12:35 -0400[diff] [blame]42CONFIG_SYS_I2C_FSL=y
43CONFIG_SYS_FSL_I2C_OFFSET=0x118000
44CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
45CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
46CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
47CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
48CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
49CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]50CONFIG_SYS_I2C_EEPROM_ADDR=0x57
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]51CONFIG_FSL_ESDHC=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]52CONFIG_MTD=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]53CONFIG_MTD_NOR_FLASH=y
54CONFIG_FLASH_CFI_DRIVER=y
55CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
56CONFIG_FLASH_CFI_MTD=y
57CONFIG_SYS_FLASH_CFI=y
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]58CONFIG_DM_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]59CONFIG_SF_DEFAULT_MODE=0
60CONFIG_SF_DEFAULT_SPEED=10000000
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]61CONFIG_SPI_FLASH_EON=y
62CONFIG_SPI_FLASH_STMICRO=y
63CONFIG_SPI_FLASH_SST=y
Alexandru Gagniucd83e98c2017-08-01 17:19:59 -0700[diff] [blame]64CONFIG_PHYLIB=y
Jeremy Gebbenabe3edf2018-09-18 15:49:35 -0600[diff] [blame]65CONFIG_PHY_AQUANTIA=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]66CONFIG_PHY_REALTEK=y
67CONFIG_PHY_TERANETICS=y
68CONFIG_PHY_VITESSE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]69CONFIG_E1000=y
Tom Rinifa911f82019-05-12 07:59:12 -0400[diff] [blame]70CONFIG_FMAN_ENET=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]71CONFIG_MII=y
Hou Zhiqianga60c51a2019-04-28 00:55:22 +0800[diff] [blame]72CONFIG_DM_PCI_COMPAT=y
73CONFIG_PCIE_FSL=y
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]74CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]75CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]76CONFIG_SPI=y
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]77CONFIG_DM_SPI=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]78CONFIG_FSL_ESPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]79CONFIG_USB=y
80CONFIG_USB_STORAGE=y
Marek Szyprowski795dc7d2020-06-03 14:43:40 +0200[diff] [blame]81CONFIG_ADDR_MAP=y
82CONFIG_SYS_NUM_ADDR_MAP=64