Ricardo Ribalda Delgado | f84496a | 2008-09-01 13:09:39 -0400 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 |
| 3 | * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es |
| 4 | * This work has been supported by: QTechnology http://qtec.com/ |
| 5 | * This program is free software: you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation, either version 2 of the License, or |
| 8 | * (at your option) any later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #ifndef __CONFIG_GEN_H |
| 19 | #define __CONFIG_GEN_H |
| 20 | /* |
| 21 | #define DEBUG |
| 22 | #define ET_DEBUG |
| 23 | */ |
| 24 | /*CPU*/ |
| 25 | #define CONFIG_XILINX_440 1 |
| 26 | #define CONFIG_440 1 |
| 27 | #define CONFIG_4xx 1 |
| 28 | |
| 29 | /*Mem Map*/ |
| 30 | #define CFG_SDRAM_BASE 0x0 |
| 31 | #define CFG_MONITOR_BASE TEXT_BASE |
| 32 | #define CFG_MONITOR_LEN (192 * 1024) |
| 33 | #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024) |
| 34 | |
| 35 | /*Uart*/ |
| 36 | #define CONFIG_XILINX_UARTLITE |
| 37 | #define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE |
| 38 | #define CFG_BAUDRATE_TABLE { XPAR_UARTLITE_0_BAUDRATE } |
| 39 | #define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR |
| 40 | |
| 41 | /*Cmd*/ |
| 42 | #include <config_cmd_default.h> |
| 43 | #define CONFIG_CMD_ASKENV |
| 44 | #define CONFIG_CMD_CACHE |
| 45 | #define CONFIG_CMD_DIAG |
| 46 | #define CONFIG_CMD_ELF |
| 47 | #define CONFIG_CMD_IRQ |
| 48 | #define CONFIG_CMD_REGINFO |
| 49 | #define CONFIG_CMD_JFFS2 |
| 50 | #define CONFIG_JFFS2_CMDLINE |
| 51 | #undef CONFIG_CMD_SPI |
| 52 | #undef CONFIG_CMD_I2C |
| 53 | #undef CONFIG_CMD_DTT |
| 54 | #undef CONFIG_CMD_NET |
| 55 | #undef CONFIG_CMD_PING |
| 56 | #undef CONFIG_CMD_DHCP |
| 57 | #undef CONFIG_CMD_EEPROM |
| 58 | #undef CONFIG_CMD_IMLS |
| 59 | |
| 60 | /*Misc*/ |
| 61 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
| 62 | #define CFG_LONGHELP /* undef to save memory */ |
| 63 | #if defined(CONFIG_CMD_KGDB) |
| 64 | #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 65 | #else |
| 66 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
| 67 | #endif |
| 68 | #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) |
| 69 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 70 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
| 71 | #define CFG_MEMTEST_START 0x00400000 /* memtest works on */ |
| 72 | #define CFG_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */ |
| 73 | #define CFG_LOAD_ADDR 0x00400000 /* default load address */ |
| 74 | #define CFG_EXTBDINFO 1 /* Extended board_into (bd_t) */ |
| 75 | #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
| 76 | #define CONFIG_CMDLINE_EDITING /* add command line history */ |
| 77 | #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ |
| 78 | #define CONFIG_LOOPW /* enable loopw command */ |
| 79 | #define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ |
| 80 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ |
| 81 | #define CONFIG_VERSION_VARIABLE /* include version env variable */ |
| 82 | #define CFG_CONSOLE_INFO_QUIET /* don't print console @ startup */ |
| 83 | #define CFG_HUSH_PARSER /* Use the HUSH parser */ |
| 84 | #define CFG_PROMPT_HUSH_PS2 "> " |
| 85 | #define CONFIG_LOADS_ECHO /* echo on for serial download */ |
| 86 | #define CFG_LOADS_BAUD_CHANGE /* allow baudrate change */ |
| 87 | #define CFG_BOOTMAPSZ (8 << 20)/* Initial Memory map for Linux */ |
| 88 | |
| 89 | /*Stack*/ |
| 90 | #define CFG_INIT_RAM_ADDR 0x800000 /* Initial RAM address */ |
| 91 | #define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */ |
| 92 | #define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */ |
| 93 | #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
| 94 | #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
| 95 | /*Speed*/ |
| 96 | #define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ |
| 97 | |
| 98 | /*Flash*/ |
| 99 | #define CFG_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR |
| 100 | #define CFG_FLASH_CFI 1 |
| 101 | #define CONFIG_FLASH_CFI_DRIVER 1 |
| 102 | #define CFG_FLASH_EMPTY_INFO 1 |
| 103 | #define CFG_MAX_FLASH_BANKS 1 |
| 104 | #define CFG_FLASH_PROTECTION |
| 105 | |
| 106 | #endif /* __CONFIG_H */ |