wdenk | 5f49575 | 2004-02-26 23:46:20 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2004 by FS Forth-Systeme GmbH. |
| 3 | * All rights reserved. |
| 4 | * Markus Pietrek <mpietrek@fsforth.de> |
| 5 | * |
| 6 | * Configuation settings for the NetSilicon NS9750 DevBoard |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #ifndef __CONFIG_H |
| 28 | #define __CONFIG_H |
| 29 | |
| 30 | /* |
wdenk | 5f49575 | 2004-02-26 23:46:20 +0000 | [diff] [blame] | 31 | * High Level Configuration Options |
| 32 | * (easy to change) |
| 33 | */ |
| 34 | #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ |
| 35 | #define CONFIG_NS9750 1 /* in an NetSilicon NS9750 SoC */ |
| 36 | #define CONFIG_NS9750DEV 1 /* on an NetSilicon NS9750 DevBoard */ |
| 37 | |
| 38 | /* input clock of PLL */ |
| 39 | #define CONFIG_SYS_CLK_FREQ 324403200 /* Don't use PLL. SW11-4 off */ |
| 40 | |
| 41 | #define CPU_CLK_FREQ (CONFIG_SYS_CLK_FREQ/2) |
| 42 | #define AHB_CLK_FREQ (CONFIG_SYS_CLK_FREQ/4) |
| 43 | #define BBUS_CLK_FREQ (CONFIG_SYS_CLK_FREQ/8) |
| 44 | |
| 45 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
| 46 | /*@TODO #define CONFIG_STATUS_LED*/ |
| 47 | #define CONFIG_USE_IRQ |
| 48 | |
| 49 | /* |
| 50 | * Size of malloc() pool |
| 51 | */ |
| 52 | #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) |
| 53 | #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial |
| 54 | * data */ |
| 55 | |
| 56 | /* |
| 57 | * Hardware drivers |
| 58 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0e9551b | 2008-08-13 01:40:39 +0200 | [diff] [blame] | 59 | #define CONFIG_NS9750_UART 1 /* use on-chip UART */ |
wdenk | 5f49575 | 2004-02-26 23:46:20 +0000 | [diff] [blame] | 60 | #define CONFIG_DRIVER_NS9750_ETHERNET 1 /* use on-chip ethernet */ |
| 61 | |
| 62 | /* |
| 63 | * select serial console configuration |
| 64 | */ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 65 | #define CONFIG_CONS_INDEX 1 /* Port B */ |
wdenk | 5f49575 | 2004-02-26 23:46:20 +0000 | [diff] [blame] | 66 | |
| 67 | /* allow to overwrite serial and ethaddr */ |
| 68 | #define CONFIG_ENV_OVERWRITE |
| 69 | |
| 70 | #define CONFIG_BAUDRATE 38400 |
| 71 | |
wdenk | 5f49575 | 2004-02-26 23:46:20 +0000 | [diff] [blame] | 72 | |
Jon Loeliger | 74fdb63 | 2007-07-04 22:33:07 -0500 | [diff] [blame] | 73 | /* |
Jon Loeliger | 140b69c | 2007-07-10 09:38:02 -0500 | [diff] [blame] | 74 | * BOOTP options |
| 75 | */ |
| 76 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 77 | #define CONFIG_BOOTP_BOOTPATH |
| 78 | #define CONFIG_BOOTP_GATEWAY |
| 79 | #define CONFIG_BOOTP_HOSTNAME |
| 80 | |
| 81 | |
| 82 | /* |
Jon Loeliger | 74fdb63 | 2007-07-04 22:33:07 -0500 | [diff] [blame] | 83 | * Command line configuration. |
| 84 | */ |
| 85 | |
| 86 | #define CONFIG_CMD_BDI |
| 87 | #define CONFIG_CMD_CONSOLE |
| 88 | #define CONFIG_CMD_LOADB |
| 89 | #define CONFIG_CMD_LOADS |
| 90 | #define CONFIG_CMD_MEMORY |
| 91 | #define CONFIG_CMD_NET |
| 92 | #define CONFIG_CMD_PING |
| 93 | |
wdenk | 5f49575 | 2004-02-26 23:46:20 +0000 | [diff] [blame] | 94 | |
| 95 | #define CONFIG_BOOTDELAY 3 |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 96 | /*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */ |
wdenk | 5f49575 | 2004-02-26 23:46:20 +0000 | [diff] [blame] | 97 | |
| 98 | #define CONFIG_ETHADDR 00:04:f3:ff:ff:fb /*@TODO unset */ |
| 99 | #define CONFIG_NETMASK 255.255.255.0 |
| 100 | #define CONFIG_IPADDR 192.168.42.30 |
| 101 | #define CONFIG_SERVERIP 192.168.42.1 |
| 102 | |
| 103 | /*#define CONFIG_BOOTFILE "elinos-lart" */ |
| 104 | /*#define CONFIG_BOOTCOMMAND "tftp; bootm" */ |
| 105 | |
Jon Loeliger | 74fdb63 | 2007-07-04 22:33:07 -0500 | [diff] [blame] | 106 | #if defined(CONFIG_CMD_KGDB) |
wdenk | 5f49575 | 2004-02-26 23:46:20 +0000 | [diff] [blame] | 107 | #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ |
| 108 | /* what's this ? it's not used anywhere */ |
| 109 | #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ |
| 110 | #endif |
| 111 | |
| 112 | /* |
| 113 | * Miscellaneous configurable options |
| 114 | */ |
| 115 | #define CFG_LONGHELP /* undef to save memory */ |
| 116 | #define CFG_PROMPT "NS9750DEV # " /* Monitor Command Prompt */ |
| 117 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
| 118 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
| 119 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 120 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
| 121 | |
| 122 | #define CFG_MEMTEST_START 0x00000000 /* memtest works on */ |
| 123 | #define CFG_MEMTEST_END 0x00780000 /* 7,5 MB in DRAM */ /* @TODO */ |
| 124 | |
| 125 | #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ |
| 126 | |
| 127 | #define CFG_LOAD_ADDR 0x00600000 /* default load address */ /* @TODO */ |
| 128 | |
| 129 | #define CFG_HZ (CPU_CLK_FREQ/64) |
| 130 | |
| 131 | /* valid baudrates */ |
| 132 | #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
| 133 | |
| 134 | #define NS9750_ETH_PHY_ADDRESS (0x0000) |
| 135 | |
| 136 | /*----------------------------------------------------------------------- |
| 137 | * Stack sizes |
| 138 | * |
| 139 | * The stack sizes are set up in start.S using the settings below |
| 140 | */ |
| 141 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
| 142 | #ifdef CONFIG_USE_IRQ |
| 143 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
| 144 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
| 145 | #endif |
| 146 | |
| 147 | /*----------------------------------------------------------------------- |
| 148 | * Physical Memory Map |
| 149 | */ |
| 150 | /* TODO */ |
| 151 | #define CONFIG_NR_DRAM_BANKS 2 /* we have 1 bank of DRAM */ |
| 152 | #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ |
| 153 | #define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */ |
| 154 | #define PHYS_SDRAM_2 0x10000000 /* SDRAM Bank #1 */ |
| 155 | #define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */ |
| 156 | |
| 157 | #define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */ |
| 158 | |
| 159 | #define CFG_FLASH_BASE PHYS_FLASH_1 |
| 160 | |
| 161 | /*----------------------------------------------------------------------- |
| 162 | * FLASH and environment organization |
| 163 | */ |
| 164 | |
| 165 | /* @TODO*/ |
| 166 | #define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */ |
| 167 | #if 0 |
| 168 | #define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */ |
| 169 | #endif |
| 170 | |
| 171 | #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
| 172 | #ifdef CONFIG_AMD_LV800 |
| 173 | #define PHYS_FLASH_SIZE 0x00100000 /* 1MB */ |
| 174 | #define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ |
| 175 | #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */ |
| 176 | #endif |
| 177 | #ifdef CONFIG_AMD_LV400 |
| 178 | #define PHYS_FLASH_SIZE 0x00080000 /* 512KB */ |
| 179 | #define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ |
| 180 | #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */ |
| 181 | #endif |
| 182 | |
| 183 | /* timeout values are in ticks */ |
| 184 | #define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */ |
| 185 | #define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */ |
| 186 | |
| 187 | /* @TODO */ |
| 188 | /*#define CFG_ENV_IS_IN_FLASH 1*/ |
| 189 | #define CFG_ENV_IS_NOWHERE |
| 190 | #define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ |
| 191 | |
| 192 | #ifdef CONFIG_STATUS_LED |
| 193 | |
| 194 | extern void __led_init(led_id_t mask, int state); |
| 195 | extern void __led_toggle(led_id_t mask); |
| 196 | extern void __led_set(led_id_t mask, int state); |
| 197 | |
| 198 | #endif /* CONFIG_STATUS_LED */ |
| 199 | |
| 200 | #endif /* __CONFIG_H */ |