blob: 021c24617575ec5d97ed3dc5825e258712b980aa [file] [log] [blame]
Thierry Reding7cef2b22019-04-15 11:32:28 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (c) 2019 NVIDIA Corporation. All rights reserved.
4 */
5
6#ifndef _TEGRA_CBOOT_H_
7#define _TEGRA_CBOOT_H_
8
9#ifdef CONFIG_ARM64
10extern unsigned long cboot_boot_x0;
11
12void cboot_save_boot_params(unsigned long x0, unsigned long x1,
13 unsigned long x2, unsigned long x3);
14int cboot_dram_init(void);
15int cboot_dram_init_banksize(void);
16ulong cboot_get_usable_ram_top(ulong total_size);
Thierry Reding37bb8292019-04-15 11:32:30 +020017int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]);
Thierry Reding7cef2b22019-04-15 11:32:28 +020018#else
19static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1,
20 unsigned long x2, unsigned long x3)
21{
22}
23
24static inline int cboot_dram_init(void)
25{
26 return -ENOSYS;
27}
28
29static inline int cboot_dram_init_banksize(void)
30{
31 return -ENOSYS;
32}
33
34static inline ulong cboot_get_usable_ram_top(ulong total_size)
35{
36 return 0;
37}
Thierry Reding37bb8292019-04-15 11:32:30 +020038
39static inline int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN])
40{
41 return -ENOSYS;
42}
Thierry Reding7cef2b22019-04-15 11:32:28 +020043#endif
44
45#endif