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git01.mediatek.com / filogic / uboot / 063cefbca1c872b3d074d4f4b72d65917d2c0bb9 / . / arch / arm / dts / rk3288-tinker-u-boot.dtsi
blob: a6f6f14df93d4f1a8053a2b15aeea826d53986de [file] [log] [blame]
Kever Yang0c518472019-07-01 11:49:11 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Rockchip Electronics Co., Ltd
4 */
5
6#include "rk3288-u-boot.dtsi"
7
Michael Trimarchifeb40d22019-11-15 22:07:23 +0100[diff] [blame]8&dmc {
Michael Trimarchifeb40d22019-11-15 22:07:23 +0100[diff] [blame]9 rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
10 0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
11 0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
12 0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
13 0x8 0x1f4>;
14 rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
15 0x0 0xc3 0x6 0x2>;
16 rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
17};
18
Jonas Karlman063cefb2024-11-05 16:00:35 +0000[diff] [blame^]19&gmac {
20 snps,reset-delays-us = <0 10000 80000>;
21};
22
Jonas Karlmanb54148a2024-11-05 16:00:25 +0000[diff] [blame]23&gpio7 {
Jonas Karlmana528d5e2024-11-05 16:00:26 +0000[diff] [blame]24 /delete-property/ bootph-all;
Jonas Karlmanb54148a2024-11-05 16:00:25 +0000[diff] [blame]25};
26
Stefan Agner96da29c2020-09-04 16:11:08 +0200[diff] [blame]27&i2c2 {
28 m24c08@50 {
29 compatible = "at,24c08", "i2c-eeprom";
30 reg = <0x50>;
31 };
32};
33
Jonas Karlmanb54148a2024-11-05 16:00:25 +0000[diff] [blame]34&pcfg_pull_none {
Jonas Karlmana528d5e2024-11-05 16:00:26 +0000[diff] [blame]35 bootph-all;
Kever Yang0c518472019-07-01 11:49:11 +0800[diff] [blame]36};
37
Jonas Karlmanb54148a2024-11-05 16:00:25 +0000[diff] [blame]38&pcfg_pull_none_drv_8ma {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]39 bootph-pre-ram;
Jonas Karlmanc8f97402024-11-05 16:00:28 +0000[diff] [blame]40 bootph-some-ram;
Kever Yang0c518472019-07-01 11:49:11 +0800[diff] [blame]41};
Kever Yang3804b762019-07-01 11:49:12 +0800[diff] [blame]42
Jonas Karlmanb54148a2024-11-05 16:00:25 +0000[diff] [blame]43&pcfg_pull_up {
Jonas Karlmana528d5e2024-11-05 16:00:26 +0000[diff] [blame]44 bootph-all;
Kever Yang3804b762019-07-01 11:49:12 +0800[diff] [blame]45};
46
47&pcfg_pull_up_drv_8ma {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]48 bootph-pre-ram;
Jonas Karlmanc8f97402024-11-05 16:00:28 +0000[diff] [blame]49 bootph-some-ram;
Kever Yang3804b762019-07-01 11:49:12 +0800[diff] [blame]50};
51
Jonas Karlmanb54148a2024-11-05 16:00:25 +0000[diff] [blame]52&sdmmc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]53 bootph-pre-ram;
Jonas Karlmanc8f97402024-11-05 16:00:28 +0000[diff] [blame]54 bootph-some-ram;
Michael Trimarchi5e2d2382019-09-17 11:40:42 +0530[diff] [blame]55};
56
Kever Yang3804b762019-07-01 11:49:12 +0800[diff] [blame]57&sdmmc_bus4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]58 bootph-pre-ram;
Jonas Karlmanc8f97402024-11-05 16:00:28 +0000[diff] [blame]59 bootph-some-ram;
Kever Yang3804b762019-07-01 11:49:12 +0800[diff] [blame]60};
61
Michael Trimarchi5e2d2382019-09-17 11:40:42 +0530[diff] [blame]62&sdmmc_cd {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]63 bootph-pre-ram;
Jonas Karlmanc8f97402024-11-05 16:00:28 +0000[diff] [blame]64 bootph-some-ram;
Michael Trimarchi5e2d2382019-09-17 11:40:42 +0530[diff] [blame]65};
66
Kever Yang3804b762019-07-01 11:49:12 +0800[diff] [blame]67&sdmmc_clk {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]68 bootph-pre-ram;
Jonas Karlmanc8f97402024-11-05 16:00:28 +0000[diff] [blame]69 bootph-some-ram;
Kever Yang3804b762019-07-01 11:49:12 +0800[diff] [blame]70};
71
72&sdmmc_cmd {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]73 bootph-pre-ram;
Jonas Karlmanc8f97402024-11-05 16:00:28 +0000[diff] [blame]74 bootph-some-ram;
Kever Yang3804b762019-07-01 11:49:12 +0800[diff] [blame]75};
76
Jonas Karlmanb54148a2024-11-05 16:00:25 +0000[diff] [blame]77&uart2 {
78 bootph-all;
79};
80
81&uart2_xfer {
Jonas Karlmana528d5e2024-11-05 16:00:26 +0000[diff] [blame]82 bootph-pre-sram;
83 bootph-pre-ram;
Jonas Karlmanb54148a2024-11-05 16:00:25 +0000[diff] [blame]84};