wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 1 | /* |
| 2 | * COM1 NS16550 support |
Stefan Roese | 88fbf93 | 2010-04-15 16:07:28 +0200 | [diff] [blame] | 3 | * originally from linux source (arch/powerpc/boot/ns16550.c) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 4 | * modified to use CONFIG_SYS_ISA_MEM and new defines |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
Simon Glass | e98e01e | 2014-09-04 16:27:32 -0600 | [diff] [blame] | 7 | #include <common.h> |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 8 | #include <dm.h> |
| 9 | #include <errno.h> |
| 10 | #include <fdtdec.h> |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 11 | #include <ns16550.h> |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 12 | #include <serial.h> |
Ladislav Michl | cc29442 | 2010-02-01 23:34:25 +0100 | [diff] [blame] | 13 | #include <watchdog.h> |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 14 | #include <linux/types.h> |
| 15 | #include <asm/io.h> |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 16 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 17 | DECLARE_GLOBAL_DATA_PTR; |
| 18 | |
Detlev Zundel | 166fb54 | 2009-04-03 11:53:01 +0200 | [diff] [blame] | 19 | #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ |
| 20 | #define UART_MCRVAL (UART_MCR_DTR | \ |
| 21 | UART_MCR_RTS) /* RTS/DTR */ |
| 22 | #define UART_FCRVAL (UART_FCR_FIFO_EN | \ |
| 23 | UART_FCR_RXSR | \ |
| 24 | UART_FCR_TXSR) /* Clear & enable FIFOs */ |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 25 | |
| 26 | #ifndef CONFIG_DM_SERIAL |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 27 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 28 | #define serial_out(x, y) outb(x, (ulong)y) |
| 29 | #define serial_in(y) inb((ulong)y) |
Dave Aldridge | a51bebc | 2011-09-01 22:47:14 +0000 | [diff] [blame] | 30 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0) |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 31 | #define serial_out(x, y) out_be32(y, x) |
| 32 | #define serial_in(y) in_be32(y) |
Dave Aldridge | a51bebc | 2011-09-01 22:47:14 +0000 | [diff] [blame] | 33 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0) |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 34 | #define serial_out(x, y) out_le32(y, x) |
| 35 | #define serial_in(y) in_le32(y) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 36 | #else |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 37 | #define serial_out(x, y) writeb(x, y) |
| 38 | #define serial_in(y) readb(y) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 39 | #endif |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 40 | #endif /* !CONFIG_DM_SERIAL */ |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 41 | |
Khoronzhuk, Ivan | 8090298 | 2014-07-16 00:59:25 +0300 | [diff] [blame] | 42 | #if defined(CONFIG_SOC_KEYSTONE) |
Vitaly Andrianov | 7bcf4d6 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 43 | #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 |
| 44 | #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) |
Karicheri, Muralidharan | cbc0888 | 2014-04-09 15:38:46 -0400 | [diff] [blame] | 45 | #undef UART_MCRVAL |
| 46 | #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL |
| 47 | #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) |
| 48 | #else |
| 49 | #define UART_MCRVAL (UART_MCR_RTS) |
| 50 | #endif |
Vitaly Andrianov | 7bcf4d6 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 51 | #endif |
| 52 | |
Prafulla Wadaskar | 6621637 | 2010-10-27 21:58:31 +0530 | [diff] [blame] | 53 | #ifndef CONFIG_SYS_NS16550_IER |
| 54 | #define CONFIG_SYS_NS16550_IER 0x00 |
| 55 | #endif /* CONFIG_SYS_NS16550_IER */ |
| 56 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 57 | #ifdef CONFIG_DM_SERIAL |
| 58 | static void ns16550_writeb(NS16550_t port, int offset, int value) |
| 59 | { |
| 60 | struct ns16550_platdata *plat = port->plat; |
| 61 | unsigned char *addr; |
| 62 | |
| 63 | offset *= 1 << plat->reg_shift; |
Simon Glass | 2546394 | 2014-10-22 21:37:04 -0600 | [diff] [blame] | 64 | addr = map_sysmem(plat->base, 0) + offset; |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 65 | /* |
| 66 | * As far as we know it doesn't make sense to support selection of |
| 67 | * these options at run-time, so use the existing CONFIG options. |
| 68 | */ |
| 69 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
Simon Glass | 96e230b | 2014-10-10 07:49:13 -0600 | [diff] [blame] | 70 | outb(value, (ulong)addr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 71 | #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) |
| 72 | out_le32(addr, value); |
| 73 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) |
| 74 | out_be32(addr, value); |
| 75 | #elif defined(CONFIG_SYS_BIG_ENDIAN) |
| 76 | writeb(value, addr + (1 << plat->reg_shift) - 1); |
| 77 | #else |
| 78 | writeb(value, addr); |
| 79 | #endif |
| 80 | } |
| 81 | |
| 82 | static int ns16550_readb(NS16550_t port, int offset) |
| 83 | { |
| 84 | struct ns16550_platdata *plat = port->plat; |
| 85 | unsigned char *addr; |
| 86 | |
| 87 | offset *= 1 << plat->reg_shift; |
Simon Glass | 2546394 | 2014-10-22 21:37:04 -0600 | [diff] [blame] | 88 | addr = map_sysmem(plat->base, 0) + offset; |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 89 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
Simon Glass | 96e230b | 2014-10-10 07:49:13 -0600 | [diff] [blame] | 90 | return inb((ulong)addr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 91 | #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) |
| 92 | return in_le32(addr); |
| 93 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) |
| 94 | return in_be32(addr); |
| 95 | #elif defined(CONFIG_SYS_BIG_ENDIAN) |
| 96 | return readb(addr + (1 << plat->reg_shift) - 1); |
| 97 | #else |
| 98 | return readb(addr); |
| 99 | #endif |
| 100 | } |
| 101 | |
| 102 | /* We can clean these up once everything is moved to driver model */ |
| 103 | #define serial_out(value, addr) \ |
| 104 | ns16550_writeb(com_port, addr - (unsigned char *)com_port, value) |
| 105 | #define serial_in(addr) \ |
| 106 | ns16550_readb(com_port, addr - (unsigned char *)com_port) |
| 107 | #endif |
| 108 | |
Simon Glass | e98e01e | 2014-09-04 16:27:32 -0600 | [diff] [blame] | 109 | int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) |
| 110 | { |
| 111 | const unsigned int mode_x_div = 16; |
| 112 | |
| 113 | #ifdef CONFIG_OMAP1510 |
| 114 | /* If can't cleanly clock 115200 set div to 1 */ |
| 115 | if ((clock == 12000000) && (baudrate == 115200)) { |
| 116 | port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */ |
| 117 | return 1; /* return 1 for base divisor */ |
| 118 | } |
| 119 | port->osc_12m_sel = 0; /* clear if previsouly set */ |
| 120 | #endif |
| 121 | |
| 122 | return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); |
| 123 | } |
| 124 | |
Simon Glass | c31ebfe | 2014-09-04 16:27:33 -0600 | [diff] [blame] | 125 | static void NS16550_setbrg(NS16550_t com_port, int baud_divisor) |
| 126 | { |
| 127 | serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); |
| 128 | serial_out(baud_divisor & 0xff, &com_port->dll); |
| 129 | serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); |
| 130 | serial_out(UART_LCRVAL, &com_port->lcr); |
| 131 | } |
| 132 | |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 133 | void NS16550_init(NS16550_t com_port, int baud_divisor) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 134 | { |
Gregoire Gentil | 6b05d0a | 2014-11-10 11:04:10 -0800 | [diff] [blame] | 135 | #if (defined(CONFIG_SPL_BUILD) && \ |
| 136 | (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX))) |
Manfred Huber | f9b8ae3 | 2013-03-29 02:52:36 +0000 | [diff] [blame] | 137 | /* |
Gregoire Gentil | 6b05d0a | 2014-11-10 11:04:10 -0800 | [diff] [blame] | 138 | * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode |
| 139 | * before SPL starts only THRE bit is set. We have to empty the |
| 140 | * transmitter before initialization starts. |
Manfred Huber | f9b8ae3 | 2013-03-29 02:52:36 +0000 | [diff] [blame] | 141 | */ |
| 142 | if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE)) |
| 143 | == UART_LSR_THRE) { |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 144 | if (baud_divisor != -1) |
| 145 | NS16550_setbrg(com_port, baud_divisor); |
Manfred Huber | f9b8ae3 | 2013-03-29 02:52:36 +0000 | [diff] [blame] | 146 | serial_out(0, &com_port->mdr1); |
| 147 | } |
| 148 | #endif |
| 149 | |
Scott Wood | 6c6f061 | 2012-09-18 18:19:05 -0500 | [diff] [blame] | 150 | while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT)) |
| 151 | ; |
| 152 | |
Prafulla Wadaskar | 6621637 | 2010-10-27 21:58:31 +0530 | [diff] [blame] | 153 | serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); |
Tom Rini | fc695e3 | 2013-12-20 11:19:33 -0500 | [diff] [blame] | 154 | #if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \ |
| 155 | defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 156 | serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ |
wdenk | 21136db | 2003-07-16 21:53:01 +0000 | [diff] [blame] | 157 | #endif |
Simon Glass | c31ebfe | 2014-09-04 16:27:33 -0600 | [diff] [blame] | 158 | NS16550_setbrg(com_port, 0); |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 159 | serial_out(UART_MCRVAL, &com_port->mcr); |
| 160 | serial_out(UART_FCRVAL, &com_port->fcr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 161 | if (baud_divisor != -1) |
| 162 | NS16550_setbrg(com_port, baud_divisor); |
Masahiro Yamada | 641e3ce | 2014-07-30 19:11:41 +0900 | [diff] [blame] | 163 | #if defined(CONFIG_OMAP) || \ |
Matt Porter | 7967b1a | 2013-03-15 10:07:09 +0000 | [diff] [blame] | 164 | defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \ |
TENART Antoine | a6be77c | 2013-07-02 12:05:58 +0200 | [diff] [blame] | 165 | defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) |
Chandan Nath | 7d74410 | 2011-10-14 02:58:26 +0000 | [diff] [blame] | 166 | |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 167 | /* /16 is proper to hit 115200 with 48MHz */ |
| 168 | serial_out(0, &com_port->mdr1); |
Mike Frysinger | d0e9786 | 2009-02-11 20:26:52 -0500 | [diff] [blame] | 169 | #endif /* CONFIG_OMAP */ |
Khoronzhuk, Ivan | 8090298 | 2014-07-16 00:59:25 +0300 | [diff] [blame] | 170 | #if defined(CONFIG_SOC_KEYSTONE) |
Vitaly Andrianov | 7bcf4d6 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 171 | serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); |
| 172 | #endif |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 173 | } |
| 174 | |
Ron Madrid | dfa028a | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 175 | #ifndef CONFIG_NS16550_MIN_FUNCTIONS |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 176 | void NS16550_reinit(NS16550_t com_port, int baud_divisor) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 177 | { |
Prafulla Wadaskar | 6621637 | 2010-10-27 21:58:31 +0530 | [diff] [blame] | 178 | serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); |
Simon Glass | c31ebfe | 2014-09-04 16:27:33 -0600 | [diff] [blame] | 179 | NS16550_setbrg(com_port, 0); |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 180 | serial_out(UART_MCRVAL, &com_port->mcr); |
| 181 | serial_out(UART_FCRVAL, &com_port->fcr); |
Simon Glass | c31ebfe | 2014-09-04 16:27:33 -0600 | [diff] [blame] | 182 | NS16550_setbrg(com_port, baud_divisor); |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 183 | } |
Ron Madrid | dfa028a | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 184 | #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 185 | |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 186 | void NS16550_putc(NS16550_t com_port, char c) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 187 | { |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 188 | while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0) |
| 189 | ; |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 190 | serial_out(c, &com_port->thr); |
Stefan Roese | 57b9988 | 2010-10-12 09:39:45 +0200 | [diff] [blame] | 191 | |
| 192 | /* |
| 193 | * Call watchdog_reset() upon newline. This is done here in putc |
| 194 | * since the environment code uses a single puts() to print the complete |
| 195 | * environment upon "printenv". So we can't put this watchdog call |
| 196 | * in puts(). |
| 197 | */ |
| 198 | if (c == '\n') |
| 199 | WATCHDOG_RESET(); |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 200 | } |
| 201 | |
Ron Madrid | dfa028a | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 202 | #ifndef CONFIG_NS16550_MIN_FUNCTIONS |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 203 | char NS16550_getc(NS16550_t com_port) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 204 | { |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 205 | while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) { |
Marek Vasut | 9e1fca9 | 2012-09-15 10:25:19 +0200 | [diff] [blame] | 206 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY) |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 207 | extern void usbtty_poll(void); |
| 208 | usbtty_poll(); |
| 209 | #endif |
Ladislav Michl | cc29442 | 2010-02-01 23:34:25 +0100 | [diff] [blame] | 210 | WATCHDOG_RESET(); |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 211 | } |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 212 | return serial_in(&com_port->rbr); |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 213 | } |
| 214 | |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 215 | int NS16550_tstc(NS16550_t com_port) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 216 | { |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 217 | return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0; |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 218 | } |
| 219 | |
Ron Madrid | dfa028a | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 220 | #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 221 | |
| 222 | #ifdef CONFIG_DM_SERIAL |
| 223 | static int ns16550_serial_putc(struct udevice *dev, const char ch) |
| 224 | { |
| 225 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 226 | |
| 227 | if (!(serial_in(&com_port->lsr) & UART_LSR_THRE)) |
| 228 | return -EAGAIN; |
| 229 | serial_out(ch, &com_port->thr); |
| 230 | |
| 231 | /* |
| 232 | * Call watchdog_reset() upon newline. This is done here in putc |
| 233 | * since the environment code uses a single puts() to print the complete |
| 234 | * environment upon "printenv". So we can't put this watchdog call |
| 235 | * in puts(). |
| 236 | */ |
| 237 | if (ch == '\n') |
| 238 | WATCHDOG_RESET(); |
| 239 | |
| 240 | return 0; |
| 241 | } |
| 242 | |
| 243 | static int ns16550_serial_pending(struct udevice *dev, bool input) |
| 244 | { |
| 245 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 246 | |
| 247 | if (input) |
| 248 | return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0; |
| 249 | else |
| 250 | return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1; |
| 251 | } |
| 252 | |
| 253 | static int ns16550_serial_getc(struct udevice *dev) |
| 254 | { |
| 255 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 256 | |
Simon Glass | ddb958c | 2014-10-22 21:37:03 -0600 | [diff] [blame] | 257 | if (!(serial_in(&com_port->lsr) & UART_LSR_DR)) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 258 | return -EAGAIN; |
| 259 | |
| 260 | return serial_in(&com_port->rbr); |
| 261 | } |
| 262 | |
| 263 | static int ns16550_serial_setbrg(struct udevice *dev, int baudrate) |
| 264 | { |
| 265 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 266 | struct ns16550_platdata *plat = com_port->plat; |
| 267 | int clock_divisor; |
| 268 | |
| 269 | clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate); |
| 270 | |
| 271 | NS16550_setbrg(com_port, clock_divisor); |
| 272 | |
| 273 | return 0; |
| 274 | } |
| 275 | |
| 276 | int ns16550_serial_probe(struct udevice *dev) |
| 277 | { |
| 278 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 279 | |
Simon Glass | 3bf04f3 | 2014-10-22 21:37:05 -0600 | [diff] [blame] | 280 | com_port->plat = dev_get_platdata(dev); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 281 | NS16550_init(com_port, -1); |
| 282 | |
| 283 | return 0; |
| 284 | } |
| 285 | |
Simon Glass | 3bf04f3 | 2014-10-22 21:37:05 -0600 | [diff] [blame] | 286 | #ifdef CONFIG_OF_CONTROL |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 287 | int ns16550_serial_ofdata_to_platdata(struct udevice *dev) |
| 288 | { |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 289 | struct ns16550_platdata *plat = dev->platdata; |
| 290 | fdt_addr_t addr; |
| 291 | |
Bin Meng | 0203c1c | 2014-12-31 16:05:12 +0800 | [diff] [blame] | 292 | /* try Processor Local Bus device first */ |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 293 | addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); |
Bin Meng | 0203c1c | 2014-12-31 16:05:12 +0800 | [diff] [blame] | 294 | #ifdef CONFIG_PCI |
| 295 | if (addr == FDT_ADDR_T_NONE) { |
| 296 | /* then try pci device */ |
| 297 | struct fdt_pci_addr pci_addr; |
| 298 | u32 bar; |
| 299 | int ret; |
| 300 | |
| 301 | /* we prefer to use a memory-mapped register */ |
| 302 | ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset, |
| 303 | FDT_PCI_SPACE_MEM32, "reg", |
| 304 | &pci_addr); |
| 305 | if (ret) { |
| 306 | /* try if there is any i/o-mapped register */ |
| 307 | ret = fdtdec_get_pci_addr(gd->fdt_blob, |
| 308 | dev->of_offset, |
| 309 | FDT_PCI_SPACE_IO, |
| 310 | "reg", &pci_addr); |
| 311 | if (ret) |
| 312 | return ret; |
| 313 | } |
| 314 | |
| 315 | ret = fdtdec_get_pci_bar32(gd->fdt_blob, dev->of_offset, |
| 316 | &pci_addr, &bar); |
| 317 | if (ret) |
| 318 | return ret; |
| 319 | |
| 320 | addr = bar; |
| 321 | } |
| 322 | #endif |
| 323 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 324 | if (addr == FDT_ADDR_T_NONE) |
| 325 | return -EINVAL; |
| 326 | |
Simon Glass | 2546394 | 2014-10-22 21:37:04 -0600 | [diff] [blame] | 327 | plat->base = addr; |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 328 | plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset, |
| 329 | "reg-shift", 1); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 330 | |
| 331 | return 0; |
| 332 | } |
Simon Glass | 3bf04f3 | 2014-10-22 21:37:05 -0600 | [diff] [blame] | 333 | #endif |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 334 | |
| 335 | const struct dm_serial_ops ns16550_serial_ops = { |
| 336 | .putc = ns16550_serial_putc, |
| 337 | .pending = ns16550_serial_pending, |
| 338 | .getc = ns16550_serial_getc, |
| 339 | .setbrg = ns16550_serial_setbrg, |
| 340 | }; |
| 341 | #endif /* CONFIG_DM_SERIAL */ |