blob: 8dbe17aa60e1e4b9dba8fafba527fa8d22663e80 [file] [log] [blame]
Graeme Russ85cc39f2009-02-24 21:14:32 +11001/*
2 * (C) Copyright 2002
3 * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/* stuff specific for the sc520, but independent of implementation */
25
26#include <common.h>
27#include <asm/ic/ssi.h>
28#include <asm/ic/sc520.h>
29
30int ssi_set_interface(int freq, int lsb_first, int inv_clock, int inv_phase)
31{
32 u8 temp=0;
33
34 if (freq >= 8192) {
35 temp |= CTL_CLK_SEL_4;
36 } else if (freq >= 4096) {
37 temp |= CTL_CLK_SEL_8;
38 } else if (freq >= 2048) {
39 temp |= CTL_CLK_SEL_16;
40 } else if (freq >= 1024) {
41 temp |= CTL_CLK_SEL_32;
42 } else if (freq >= 512) {
43 temp |= CTL_CLK_SEL_64;
44 } else if (freq >= 256) {
45 temp |= CTL_CLK_SEL_128;
46 } else if (freq >= 128) {
47 temp |= CTL_CLK_SEL_256;
48 } else {
49 temp |= CTL_CLK_SEL_512;
50 }
51
52 if (!lsb_first) {
53 temp |= MSBF_ENB;
54 }
55
56 if (inv_clock) {
57 temp |= CLK_INV_ENB;
58 }
59
60 if (inv_phase) {
61 temp |= PHS_INV_ENB;
62 }
63
Graeme Russ1d977dc2009-08-23 12:59:56 +100064 sc520_mmcr->ssictl = temp;
Graeme Russ85cc39f2009-02-24 21:14:32 +110065
66 return 0;
67}
68
69u8 ssi_txrx_byte(u8 data)
70{
Graeme Russ1d977dc2009-08-23 12:59:56 +100071 sc520_mmcr->ssixmit = data;
72 while (sc520_mmcr->ssista & SSISTA_BSY);
73 sc520_mmcr->ssicmd = SSICMD_CMD_SEL_XMITRCV;
74 while (sc520_mmcr->ssista & SSISTA_BSY);
75
76 return sc520_mmcr->ssircv;
Graeme Russ85cc39f2009-02-24 21:14:32 +110077}
78
79
80void ssi_tx_byte(u8 data)
81{
Graeme Russ1d977dc2009-08-23 12:59:56 +100082 sc520_mmcr->ssixmit = data;
83 while (sc520_mmcr->ssista & SSISTA_BSY);
84 sc520_mmcr->ssicmd = SSICMD_CMD_SEL_XMIT;
Graeme Russ85cc39f2009-02-24 21:14:32 +110085}
86
87u8 ssi_rx_byte(void)
88{
Graeme Russ1d977dc2009-08-23 12:59:56 +100089 while (sc520_mmcr->ssista & SSISTA_BSY);
90 sc520_mmcr->ssicmd = SSICMD_CMD_SEL_RCV;
91 while (sc520_mmcr->ssista & SSISTA_BSY);
92
93 return sc520_mmcr->ssircv;
Graeme Russ85cc39f2009-02-24 21:14:32 +110094}