blob: fd755bbceae8a3a794c7e6cccd6d29a225ef3c3c [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Pali Rohár248ef0a2012-10-29 07:54:01 +00002/*
3 * (C) Copyright 2011-2012
4 * Pali Rohár <pali.rohar@gmail.com>
5 *
6 * (C) Copyright 2010
7 * Alistair Buxton <a.j.buxton@gmail.com>
8 *
9 * Derived from Beagle Board code:
10 * (C) Copyright 2006-2008
11 * Texas Instruments.
12 * Richard Woodruff <r-woodruff2@ti.com>
13 * Syed Mohammed Khasim <x0khasim@ti.com>
14 *
15 * Configuration settings for the Nokia RX-51 aka N900.
Pali Rohár248ef0a2012-10-29 07:54:01 +000016 */
17
18#ifndef __CONFIG_H
19#define __CONFIG_H
20
21/*
22 * High Level Configuration Options
23 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000024#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
25
26#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
27
28/*
29 * Nokia X-Loader loading secondary image to address 0x80400000
30 * NOLO loading boot image to random place, so it doesn't really
31 * matter what we set this to. We have to copy u-boot to this address
32 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000033
Pali Rohár248ef0a2012-10-29 07:54:01 +000034#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050035#include <asm/arch/omap.h>
Pali Rohár248ef0a2012-10-29 07:54:01 +000036#include <asm/arch/mem.h>
37#include <linux/stringify.h>
38
Pali Rohár248ef0a2012-10-29 07:54:01 +000039/* Clock Defines */
40#define V_OSCK 26000000 /* Clock output from T2 */
41#define V_SCLK (V_OSCK >> 1)
42
Pali Rohár248ef0a2012-10-29 07:54:01 +000043#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
44
45#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
46#define CONFIG_INITRD_TAG /* enable passing initrd */
47#define CONFIG_REVISION_TAG /* enable passing revision tag*/
48#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
49
50/*
51 * Size of malloc() pool
52 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000053#define CONFIG_UBI_SIZE (512 << 10)
54#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
55 (128 << 10))
56
57/*
58 * Hardware drivers
59 */
60
61/*
62 * NS16550 Configuration
63 */
64#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
65
Pali Rohár248ef0a2012-10-29 07:54:01 +000066#define CONFIG_SYS_NS16550_SERIAL
67#define CONFIG_SYS_NS16550_REG_SIZE (-4)
68#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
69
70/*
71 * select serial console configuration
72 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000073#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
Pali Rohár248ef0a2012-10-29 07:54:01 +000074
75/* allow to overwrite serial and ethaddr */
76#define CONFIG_ENV_OVERWRITE
Pali Rohár248ef0a2012-10-29 07:54:01 +000077#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
Pali Rohár248ef0a2012-10-29 07:54:01 +000078
Pali Rohár248ef0a2012-10-29 07:54:01 +000079/* USB device configuration */
80#define CONFIG_USB_DEVICE
81#define CONFIG_USBD_VENDORID 0x0421
82#define CONFIG_USBD_PRODUCTID 0x01c8
83#define CONFIG_USBD_MANUFACTURER "Nokia"
84#define CONFIG_USBD_PRODUCT_NAME "N900"
85
Pali Rohár248ef0a2012-10-29 07:54:01 +000086/* commands to include */
Pali Rohár248ef0a2012-10-29 07:54:01 +000087
Heiko Schocherf53f2b82013-10-22 11:03:18 +020088#define CONFIG_SYS_I2C
Pali Rohár248ef0a2012-10-29 07:54:01 +000089
90/*
91 * TWL4030
92 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000093
Pali Rohár248ef0a2012-10-29 07:54:01 +000094#define GPIO_SLIDE 71
95
96/*
97 * Board ONENAND Info.
98 */
99
100#define PART1_NAME "bootloader"
101#define PART1_SIZE 128
102#define PART1_MULL 1024
103#define PART1_SUFF "k"
104#define PART1_OFFS 0x00000000
105#define PART1_MASK 0x00000003
106
107#define PART2_NAME "config"
108#define PART2_SIZE 384
109#define PART2_MULL 1024
110#define PART2_SUFF "k"
111#define PART2_OFFS 0x00020000
112#define PART2_MASK 0x00000000
113
114#define PART3_NAME "log"
115#define PART3_SIZE 256
116#define PART3_MULL 1024
117#define PART3_SUFF "k"
118#define PART3_OFFS 0x00080000
119#define PART3_MASK 0x00000000
120
121#define PART4_NAME "kernel"
122#define PART4_SIZE 2
123#define PART4_MULL 1024*1024
124#define PART4_SUFF "m"
125#define PART4_OFFS 0x000c0000
126#define PART4_MASK 0x00000000
127
128#define PART5_NAME "initfs"
129#define PART5_SIZE 2
130#define PART5_MULL 1024*1024
131#define PART5_SUFF "m"
132#define PART5_OFFS 0x002c0000
133#define PART5_MASK 0x00000000
134
135#define PART6_NAME "rootfs"
136#define PART6_SIZE 257280
137#define PART6_MULL 1024
138#define PART6_SUFF "k"
139#define PART6_OFFS 0x004c0000
140#define PART6_MASK 0x00000000
141
142#ifdef ONENAND_SUPPORT
143
Pali Rohár248ef0a2012-10-29 07:54:01 +0000144#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
Pali Rohár248ef0a2012-10-29 07:54:01 +0000145
Pali Rohár248ef0a2012-10-29 07:54:01 +0000146#endif
147
148/* Watchdog support */
149#define CONFIG_HW_WATCHDOG
150
151/*
152 * Framebuffer
153 */
154/* Video console */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000155#define CONFIG_VIDEO_LOGO
156#define VIDEO_FB_16BPP_PIXEL_SWAP
157#define VIDEO_FB_16BPP_WORD_SWAP
Pali Rohár248ef0a2012-10-29 07:54:01 +0000158#define CONFIG_SPLASH_SCREEN
159
160/* functions for cfb_console */
161#define VIDEO_KBD_INIT_FCT rx51_kp_init()
162#define VIDEO_TSTC_FCT rx51_kp_tstc
163#define VIDEO_GETC_FCT rx51_kp_getc
164#ifndef __ASSEMBLY__
Simon Glass0d1e1f72014-07-23 06:54:59 -0600165struct stdio_dev;
Pali Rohár248ef0a2012-10-29 07:54:01 +0000166int rx51_kp_init(void);
Simon Glass0d1e1f72014-07-23 06:54:59 -0600167int rx51_kp_tstc(struct stdio_dev *sdev);
168int rx51_kp_getc(struct stdio_dev *sdev);
Pali Rohár248ef0a2012-10-29 07:54:01 +0000169#endif
170
Pali Rohár248ef0a2012-10-29 07:54:01 +0000171/* Environment information */
Tom Rini5ad8e112017-10-22 17:55:07 -0400172#ifdef CONFIG_MTDPARTS_DEFAULT
173#define MTDPARTS "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
174#else
175#define MTDPARTS
176#endif
Pali Rohár248ef0a2012-10-29 07:54:01 +0000177#define CONFIG_EXTRA_ENV_SETTINGS \
Tom Rini5ad8e112017-10-22 17:55:07 -0400178 MTDPARTS \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000179 "usbtty=cdc_acm\0" \
180 "stdin=vga\0" \
181 "stdout=vga\0" \
182 "stderr=vga\0" \
183 "setcon=setenv stdin ${con};" \
184 "setenv stdout ${con};" \
185 "setenv stderr ${con}\0" \
186 "sercon=setenv con serial; run setcon\0" \
187 "usbcon=setenv con usbtty; run setcon\0" \
188 "vgacon=setenv con vga; run setcon\0" \
189 "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
190 "switchmmc=mmc dev ${mmcnum}\0" \
191 "kernaddr=0x82008000\0" \
192 "initrdaddr=0x84008000\0" \
193 "scriptaddr=0x86008000\0" \
194 "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
195 "${loadaddr} ${mmcfile}\0" \
196 "kernload=setenv loadaddr ${kernaddr};" \
197 "setenv mmcfile ${mmckernfile};" \
198 "run fileload\0" \
199 "initrdload=setenv loadaddr ${initrdaddr};" \
200 "setenv mmcfile ${mmcinitrdfile};" \
201 "run fileload\0" \
202 "scriptload=setenv loadaddr ${scriptaddr};" \
203 "setenv mmcfile ${mmcscriptfile};" \
204 "run fileload\0" \
205 "scriptboot=echo Running ${mmcscriptfile} from mmc " \
206 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
207 "kernboot=echo Booting ${mmckernfile} from mmc " \
208 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
209 "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
210 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
211 "attachboot=echo Booting attached kernel image ...;" \
212 "setenv setup_omap_atag 1;" \
213 "bootm ${attkernaddr};" \
214 "setenv setup_omap_atag\0" \
215 "trymmcscriptboot=if run switchmmc; then " \
216 "if run scriptload; then " \
217 "run scriptboot;" \
218 "fi;" \
219 "fi\0" \
220 "trymmckernboot=if run switchmmc; then " \
221 "if run kernload; then " \
222 "run kernboot;" \
223 "fi;" \
224 "fi\0" \
225 "trymmckerninitrdboot=if run switchmmc; then " \
226 "if run initrdload; then " \
227 "if run kernload; then " \
228 "run kerninitrdboot;" \
229 "fi;" \
230 "fi; " \
231 "fi\0" \
232 "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
233 "setenv mmckernfile uImage; run trymmckernboot\0" \
234 "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
235 "setenv mmcpart 2; run trymmcpartboot;" \
236 "setenv mmcpart 3; run trymmcpartboot;" \
237 "setenv mmcpart 4; run trymmcpartboot\0" \
238 "trymmcboot=if run switchmmc; then " \
239 "setenv mmctype fat;" \
240 "run trymmcallpartboot;" \
241 "setenv mmctype ext2;" \
242 "run trymmcallpartboot;" \
243 "setenv mmctype ext4;" \
244 "run trymmcallpartboot;" \
245 "fi\0" \
246 "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
247 "sdboot=setenv mmcnum 0; run trymmcboot\0" \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000248 "menucmd=bootmenu\0" \
249 "bootmenu_0=Attached kernel=run attachboot\0" \
250 "bootmenu_1=Internal eMMC=run emmcboot\0" \
251 "bootmenu_2=External SD card=run sdboot\0" \
252 "bootmenu_3=U-Boot boot order=boot\0" \
253 "bootmenu_delay=30\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000254 ""
255
Pali Rohár13eb3e42013-03-07 05:15:19 +0000256#define CONFIG_POSTBOOTMENU \
257 "echo;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000258 "echo Extra commands:;" \
259 "echo run sercon - Use serial port for control.;" \
260 "echo run usbcon - Use usbtty for control.;" \
261 "echo run vgacon - Use framebuffer/keyboard.;" \
262 "echo run sdboot - Boot from SD card slot.;" \
263 "echo run emmcboot - Boot internal eMMC memory.;" \
264 "echo run attachboot - Boot attached kernel image.;" \
265 "echo"
266
267#define CONFIG_BOOTCOMMAND \
268 "run sdboot;" \
269 "run emmcboot;" \
270 "run attachboot;" \
271 "echo"
272
Pali Rohár248ef0a2012-10-29 07:54:01 +0000273/*
274 * Miscellaneous configurable options
275 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000276
277#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
278#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/
279
280/* default load address */
281#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
282
283/*
284 * OMAP3 has 12 GP timers, they can be driven by the system clock
285 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
286 * This rate is divided by a local divisor.
287 */
288#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
289#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000290
291/*
Pali Rohár248ef0a2012-10-29 07:54:01 +0000292 * Physical Memory Map
293 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000294#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
295
296/*
297 * FLASH and environment organization
298 */
299
Pali Rohár248ef0a2012-10-29 07:54:01 +0000300#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
301#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
302#define CONFIG_SYS_INIT_RAM_SIZE 0x800
303#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
304 CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
305
306/*
307 * Attached kernel image
308 */
309
310#define SDRAM_SIZE 0x10000000 /* 256 MB */
311#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
312
313#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
314#define KERNEL_OFFSET 0x40000 /* 256 kB */
315#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
316#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
317
318/* Reserve protected RAM for attached kernel */
319#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
320
321#endif /* __CONFIG_H */