blob: 72ce8731a1d5d4d3aea3f0e602715d5f006deffb [file] [log] [blame]
developerfc527f72020-11-12 16:36:24 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
4 *
5 * Author: Weijie Gao <weijie.gao@mediatek.com>
6 */
7
8#include <dm.h>
9#include <dm/pinctrl.h>
10#include <linux/bitops.h>
11#include <linux/io.h>
12
13#include "pinctrl-mtmips-common.h"
14
15#define SUTIF_SHIFT 30
16#define WDT_RST_SHIFT 21
17#define PA_G_SHIFT 20
18#define NAND_SD_SHIFT 18
19#define PERST_SHIFT 16
20#define EPHY_LED_SHIFT 15
21#define WLED_SHIFT 13
22#define SPI_CS1_SHIFT 12
23#define SPI_SHIFT 11
24#define RGMII2_SHIFT 10
25#define RGMII1_SHIFT 9
26#define MDIO_SHIFT 7
27#define UARTL_SHIFT 5
28#define UARTF_SHIFT 2
29#define I2C_SHIFT 0
30
31#define GM4_MASK 3
32#define GM8_MASK 7
33
34#if CONFIG_IS_ENABLED(PINMUX)
35static const struct mtmips_pmx_func sutif_grp[] = {
36 FUNC("i2c", 2),
37 FUNC("uartl", 1),
38 FUNC("none", 0),
39};
40
41static const struct mtmips_pmx_func wdt_rst_grp[] = {
42 FUNC("gpio", 2),
43 FUNC("refclk", 1),
44 FUNC("wdt rst", 0),
45};
46
47static const struct mtmips_pmx_func pa_g_grp[] = {
48 FUNC("gpio", 1),
49 FUNC("pa", 0),
50};
51
52static const struct mtmips_pmx_func nand_sd_grp[] = {
53 FUNC("gpio", 2),
54 FUNC("sd", 1),
55 FUNC("nand", 0),
56};
57
58static const struct mtmips_pmx_func perst_grp[] = {
59 FUNC("gpio", 2),
60 FUNC("refclk", 1),
61 FUNC("perst", 0),
62};
63
64static const struct mtmips_pmx_func ephy_led_grp[] = {
65 FUNC("gpio", 1),
66 FUNC("led", 0),
67};
68
69static const struct mtmips_pmx_func wled_grp[] = {
70 FUNC("gpio", 1),
71 FUNC("led", 0),
72};
73
74static const struct mtmips_pmx_func spi_cs1_grp[] = {
75 FUNC("refclk", 1),
76 FUNC("spi cs1", 0),
77};
78
79static const struct mtmips_pmx_func spi_grp[] = {
80 FUNC("gpio", 1),
81 FUNC("spi", 0),
82};
83
84static const struct mtmips_pmx_func rgmii2_grp[] = {
85 FUNC("gpio", 1),
86 FUNC("rgmii2", 0),
87};
88
89static const struct mtmips_pmx_func rgmii1_grp[] = {
90 FUNC("gpio", 1),
91 FUNC("rgmii1", 0),
92};
93
94static const struct mtmips_pmx_func mdio_grp[] = {
95 FUNC("gpio", 2),
96 FUNC("refclk", 1),
97 FUNC("mdio", 0),
98};
99
100static const struct mtmips_pmx_func uartl_grp[] = {
101 FUNC("gpio", 1),
102 FUNC("uartl", 0),
103};
104
105static const struct mtmips_pmx_func uartf_grp[] = {
106 FUNC("gpio", 7),
107 FUNC("i2s gpio", 6),
108 FUNC("uartf gpio", 5),
109 FUNC("gpio pcm", 4),
110 FUNC("i2s uartf", 3),
111 FUNC("i2s pcm", 2),
112 FUNC("uartf pcm", 1),
113 FUNC("uartf", 0),
114};
115
116static const struct mtmips_pmx_func i2c_grp[] = {
117 FUNC("gpio", 1),
118 FUNC("i2c", 0),
119};
120
121static const struct mtmips_pmx_group mt7620_pinmux_data[] = {
122 GRP("sutif", sutif_grp, 0, SUTIF_SHIFT, GM4_MASK),
123 GRP("wdt rst", wdt_rst_grp, 0, WDT_RST_SHIFT, GM4_MASK),
124 GRP("pa", pa_g_grp, 0, PA_G_SHIFT, 1),
125 GRP("nand", nand_sd_grp, 0, NAND_SD_SHIFT, GM4_MASK),
126 GRP("perst", perst_grp, 0, PERST_SHIFT, GM4_MASK),
127 GRP("ephy led", ephy_led_grp, 0, EPHY_LED_SHIFT, 1),
128 GRP("wled", wled_grp, 0, WLED_SHIFT, 1),
129 GRP("spi cs1", spi_cs1_grp, 0, SPI_CS1_SHIFT, 1),
130 GRP("spi", spi_grp, 0, SPI_SHIFT, 1),
131 GRP("rgmii2", rgmii2_grp, 0, RGMII2_SHIFT, 1),
132 GRP("rgmii1", rgmii1_grp, 0, RGMII1_SHIFT, 1),
133 GRP("mdio", mdio_grp, 0, MDIO_SHIFT, GM4_MASK),
134 GRP("uartl", uartl_grp, 0, UARTL_SHIFT, 1),
135 GRP("uartf", uartf_grp, 0, UARTF_SHIFT, GM8_MASK),
136 GRP("i2c", i2c_grp, 0, I2C_SHIFT, 1),
137};
138
139static int mt7620_get_groups_count(struct udevice *dev)
140{
141 return ARRAY_SIZE(mt7620_pinmux_data);
142}
143
144static const char *mt7620_get_group_name(struct udevice *dev,
145 unsigned int selector)
146{
147 return mt7620_pinmux_data[selector].name;
148}
149#endif /* CONFIG_IS_ENABLED(PINMUX) */
150
151static int mt7620_pinctrl_probe(struct udevice *dev)
152{
153 struct mtmips_pinctrl_priv *priv = dev_get_priv(dev);
154 int ret = 0;
155
156#if CONFIG_IS_ENABLED(PINMUX)
157 ret = mtmips_pinctrl_probe(priv, ARRAY_SIZE(mt7620_pinmux_data),
158 mt7620_pinmux_data);
159#endif /* CONFIG_IS_ENABLED(PINMUX) */
160
161 return ret;
162}
163
164static int mt7620_pinctrl_of_to_plat(struct udevice *dev)
165{
166 struct mtmips_pinctrl_priv *priv = dev_get_priv(dev);
167
168 priv->base = dev_remap_addr_index(dev, 0);
169 if (!priv->base)
170 return -EINVAL;
171
172 return 0;
173}
174
175static const struct pinctrl_ops mt7620_pinctrl_ops = {
176#if CONFIG_IS_ENABLED(PINMUX)
177 .get_groups_count = mt7620_get_groups_count,
178 .get_group_name = mt7620_get_group_name,
179 .get_functions_count = mtmips_get_functions_count,
180 .get_function_name = mtmips_get_function_name,
181 .pinmux_group_set = mtmips_pinmux_group_set,
182#endif /* CONFIG_IS_ENABLED(PINMUX) */
183 .set_state = pinctrl_generic_set_state,
184};
185
186static const struct udevice_id mt7620_pinctrl_ids[] = {
187 { .compatible = "mediatek,mt7620-pinctrl" },
188 { }
189};
190
191U_BOOT_DRIVER(mt7620_pinctrl) = {
192 .name = "mt7620-pinctrl",
193 .id = UCLASS_PINCTRL,
194 .of_match = mt7620_pinctrl_ids,
195 .of_to_plat = mt7620_pinctrl_of_to_plat,
196 .ops = &mt7620_pinctrl_ops,
197 .probe = mt7620_pinctrl_probe,
198 .priv_auto = sizeof(struct mtmips_pinctrl_priv),
199 .flags = DM_FLAG_PRE_RELOC,
200};