blob: b84528ba3b565bfcb5c9c1c58c74fd8b25eeb691 [file] [log] [blame]
Ilya Yanok15d67a52012-11-06 13:06:34 +00001/*
2 * (C) Copyright 2012
3 * Konstantin Kozhevnikov, Cogent Embedded
4 *
5 * based on nand_spl_simple code
6 *
7 * (C) Copyright 2006-2008
8 * Stefan Roese, DENX Software Engineering, sr@denx.de.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc.
23 */
24
25#include <common.h>
26#include <nand.h>
27#include <asm/io.h>
28#include <linux/mtd/nand_ecc.h>
29
30static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
31static nand_info_t mtd;
32static struct nand_chip nand_chip;
33
34#define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
35 CONFIG_SYS_NAND_ECCSIZE)
36#define ECCTOTAL (ECCSTEPS * CONFIG_SYS_NAND_ECCBYTES)
37
38
39/*
40 * NAND command for large page NAND devices (2k)
41 */
42static int nand_command(int block, int page, uint32_t offs,
43 u8 cmd)
44{
45 struct nand_chip *this = mtd.priv;
46 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
47 void (*hwctrl)(struct mtd_info *mtd, int cmd,
48 unsigned int ctrl) = this->cmd_ctrl;
49
50 while (!this->dev_ready(&mtd))
51 ;
52
53 /* Emulate NAND_CMD_READOOB */
54 if (cmd == NAND_CMD_READOOB) {
55 offs += CONFIG_SYS_NAND_PAGE_SIZE;
56 cmd = NAND_CMD_READ0;
57 }
58
59 /* Begin command latch cycle */
60 hwctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
61
62 if (cmd == NAND_CMD_RESET) {
63 hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
64 while (!this->dev_ready(&mtd))
65 ;
66 return 0;
67 }
68
69 /* Shift the offset from byte addressing to word addressing. */
70 if (this->options & NAND_BUSWIDTH_16)
71 offs >>= 1;
72
73 /* Set ALE and clear CLE to start address cycle */
74 /* Column address */
75 hwctrl(&mtd, offs & 0xff,
76 NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
77 hwctrl(&mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
78 /* Row address */
79 hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
80 hwctrl(&mtd, ((page_addr >> 8) & 0xff),
81 NAND_CTRL_ALE); /* A[27:20] */
82#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
83 /* One more address cycle for devices > 128MiB */
84 hwctrl(&mtd, (page_addr >> 16) & 0x0f,
85 NAND_CTRL_ALE); /* A[31:28] */
86#endif
87 hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
88
89 if (cmd == NAND_CMD_READ0) {
90 /* Latch in address */
91 hwctrl(&mtd, NAND_CMD_READSTART,
92 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
93 hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
94
95 /*
96 * Wait a while for the data to be ready
97 */
98 while (!this->dev_ready(&mtd))
99 ;
100 } else if (cmd == NAND_CMD_RNDOUT) {
101 hwctrl(&mtd, NAND_CMD_RNDOUTSTART, NAND_CTRL_CLE |
102 NAND_CTRL_CHANGE);
103 hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
104 }
105
106 return 0;
107}
108
109static int nand_is_bad_block(int block)
110{
111 struct nand_chip *this = mtd.priv;
112
113 nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
114 NAND_CMD_READOOB);
115
116 /*
117 * Read one byte (or two if it's a 16 bit chip).
118 */
119 if (this->options & NAND_BUSWIDTH_16) {
120 if (readw(this->IO_ADDR_R) != 0xffff)
121 return 1;
122 } else {
123 if (readb(this->IO_ADDR_R) != 0xff)
124 return 1;
125 }
126
127 return 0;
128}
129
130static int nand_read_page(int block, int page, void *dst)
131{
132 struct nand_chip *this = mtd.priv;
133 u_char ecc_calc[ECCTOTAL];
134 u_char ecc_code[ECCTOTAL];
135 u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
136 int i;
137 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
138 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
139 int eccsteps = ECCSTEPS;
140 uint8_t *p = dst;
141 uint32_t data_pos = 0;
142 uint8_t *oob = &oob_data[0] + nand_ecc_pos[0];
143 uint32_t oob_pos = eccsize * eccsteps + nand_ecc_pos[0];
144
145 nand_command(block, page, 0, NAND_CMD_READ0);
146
147 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
148 this->ecc.hwctl(&mtd, NAND_ECC_READ);
149 nand_command(block, page, data_pos, NAND_CMD_RNDOUT);
150
151 this->read_buf(&mtd, p, eccsize);
152
153 nand_command(block, page, oob_pos, NAND_CMD_RNDOUT);
154
155 this->read_buf(&mtd, oob, eccbytes);
156 this->ecc.calculate(&mtd, p, &ecc_calc[i]);
157
158 data_pos += eccsize;
159 oob_pos += eccbytes;
160 oob += eccbytes;
161 }
162
163 /* Pick the ECC bytes out of the oob data */
164 for (i = 0; i < ECCTOTAL; i++)
165 ecc_code[i] = oob_data[nand_ecc_pos[i]];
166
167 eccsteps = ECCSTEPS;
168 p = dst;
169
170 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
171 /* No chance to do something with the possible error message
172 * from correct_data(). We just hope that all possible errors
173 * are corrected by this routine.
174 */
175 this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
176 }
177
178 return 0;
179}
180
181int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
182{
183 unsigned int block, lastblock;
184 unsigned int page;
185
186 /*
187 * offs has to be aligned to a page address!
188 */
189 block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
190 lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
191 page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
192
193 while (block <= lastblock) {
194 if (!nand_is_bad_block(block)) {
195 /*
196 * Skip bad blocks
197 */
198 while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
199 nand_read_page(block, page, dst);
200 dst += CONFIG_SYS_NAND_PAGE_SIZE;
201 page++;
202 }
203
204 page = 0;
205 } else {
206 lastblock++;
207 }
208
209 block++;
210 }
211
212 return 0;
213}
214
215/* nand_init() - initialize data to make nand usable by SPL */
216void nand_init(void)
217{
218 /*
219 * Init board specific nand support
220 */
221 mtd.priv = &nand_chip;
222 nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
223 (void __iomem *)CONFIG_SYS_NAND_BASE;
224 board_nand_init(&nand_chip);
225
226 if (nand_chip.select_chip)
227 nand_chip.select_chip(&mtd, 0);
228
229 /* NAND chip may require reset after power-on */
230 nand_command(0, 0, 0, NAND_CMD_RESET);
231}
232
233/* Unselect after operation */
234void nand_deselect(void)
235{
236 if (nand_chip.select_chip)
237 nand_chip.select_chip(&mtd, -1);
238}