| Masahiro Yamada | d5f8fee | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 1 | CONFIG_ARM=y |
| Masahiro Yamada | 8204bd1 | 2015-03-16 16:43:24 +0900 | [diff] [blame] | 2 | CONFIG_ARCH_ZYNQ=y |
| Michal Simek | 9254387 | 2016-12-16 11:57:17 +0100 | [diff] [blame] | 3 | CONFIG_SYS_TEXT_BASE=0x4000000 |
| Michal Simek | 040050b | 2018-03-23 09:34:00 +0100 | [diff] [blame] | 4 | CONFIG_SPL=y |
| Michal Simek | 96794a7 | 2017-12-13 10:35:06 +0100 | [diff] [blame] | 5 | CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM010" |
| Michal Simek | c7abf8d | 2017-12-01 13:50:33 +0100 | [diff] [blame] | 6 | CONFIG_SPL_STACK_R_ADDR=0x200000 |
| Masahiro Yamada | 8c65b9d | 2014-09-22 19:59:06 +0900 | [diff] [blame] | 7 | CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm010" |
| Michal Simek | 8691e81 | 2017-11-02 10:40:57 +0100 | [diff] [blame] | 8 | CONFIG_DEBUG_UART=y |
| Michal Simek | 8a0e11c | 2018-01-09 19:31:16 +0100 | [diff] [blame] | 9 | CONFIG_DISTRO_DEFAULTS=y |
| Ruchika Gupta | e9a788d | 2015-01-23 16:01:53 +0530 | [diff] [blame] | 10 | CONFIG_FIT=y |
| Ruchika Gupta | e9a788d | 2015-01-23 16:01:53 +0530 | [diff] [blame] | 11 | CONFIG_FIT_SIGNATURE=y |
| Jagan Teki | 4c57e4c | 2017-01-21 11:48:33 +0100 | [diff] [blame] | 12 | CONFIG_FIT_VERBOSE=y |
| Alex Kiernan | 0419a9b | 2018-04-20 21:25:38 +0000 | [diff] [blame^] | 13 | CONFIG_IMAGE_FORMAT_LEGACY=y |
| Michal Simek | 0c60e2f | 2018-01-09 17:41:37 +0100 | [diff] [blame] | 14 | CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd" |
| Lokesh Vutla | fbad370 | 2016-10-08 14:41:44 -0400 | [diff] [blame] | 15 | # CONFIG_DISPLAY_CPUINFO is not set |
| Michal Simek | c7abf8d | 2017-12-01 13:50:33 +0100 | [diff] [blame] | 16 | CONFIG_SPL_STACK_R=y |
| Heiko Schocher | 1d12ba2 | 2016-10-06 07:55:15 +0200 | [diff] [blame] | 17 | CONFIG_SPL_OS_BOOT=y |
| Marek Vasut | e254225 | 2018-04-07 16:05:27 +0200 | [diff] [blame] | 18 | CONFIG_SPL_SPI_LOAD=y |
| Siva Durga Prasad Paladugu | 59d461e | 2016-01-11 12:01:10 +0530 | [diff] [blame] | 19 | CONFIG_SYS_PROMPT="Zynq> " |
| Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 20 | # CONFIG_CMD_FLASH is not set |
| Simon Glass | 80cb189 | 2017-05-17 03:25:21 -0600 | [diff] [blame] | 21 | CONFIG_CMD_FPGA_LOADBP=y |
| 22 | CONFIG_CMD_FPGA_LOADFS=y | ||||
| 23 | CONFIG_CMD_FPGA_LOADMK=y | ||||
| 24 | CONFIG_CMD_FPGA_LOADP=y | ||||
| Thomas Chou | 3a077cd | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 25 | CONFIG_CMD_GPIO=y |
| Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 26 | CONFIG_CMD_MMC=y |
| 27 | CONFIG_CMD_SF=y | ||||
| Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 28 | # CONFIG_CMD_SETEXPR is not set |
| Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 29 | CONFIG_CMD_TFTPPUT=y |
| Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 30 | CONFIG_CMD_CACHE=y |
| Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 31 | CONFIG_CMD_EXT4_WRITE=y |
| Tom Rini | 732aa4a | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 32 | # CONFIG_SPL_DOS_PARTITION is not set |
| Tom Rini | 732aa4a | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 33 | # CONFIG_SPL_EFI_PARTITION is not set |
| Tom Rini | 5b0b040 | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 34 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| Masahiro Yamada | 88e2e36 | 2015-07-17 20:26:06 +0900 | [diff] [blame] | 35 | CONFIG_NET_RANDOM_ETHADDR=y |
| Nathan Rossi | dd71c8a | 2016-01-08 03:00:46 +1000 | [diff] [blame] | 36 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| Michal Simek | 216f637 | 2017-11-03 15:53:56 +0100 | [diff] [blame] | 37 | CONFIG_FPGA_XILINX=y |
| Vipul Kumar | 4a4946b | 2018-02-16 18:02:51 +0530 | [diff] [blame] | 38 | CONFIG_FPGA_ZYNQPL=y |
| Michal Simek | 846d61b | 2018-01-09 15:27:31 +0100 | [diff] [blame] | 39 | CONFIG_DM_GPIO=y |
| Masahiro Yamada | 7db8c17 | 2016-12-07 22:10:28 +0900 | [diff] [blame] | 40 | CONFIG_MMC_SDHCI=y |
| Michal Simek | 19abc1d | 2017-02-10 13:57:35 +0100 | [diff] [blame] | 41 | CONFIG_MMC_SDHCI_ZYNQ=y |
| Joe Hershberger | 17491a8 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 42 | CONFIG_SPI_FLASH=y |
| Michal Simek | d4b2f10 | 2016-01-12 13:44:29 +0100 | [diff] [blame] | 43 | CONFIG_SPI_FLASH_BAR=y |
| Michal Simek | 27ebfbd | 2017-11-02 10:44:48 +0100 | [diff] [blame] | 44 | CONFIG_SPI_FLASH_MACRONIX=y |
| Bin Meng | 27f5b19 | 2015-11-25 05:34:54 -0800 | [diff] [blame] | 45 | CONFIG_SPI_FLASH_SPANSION=y |
| 46 | CONFIG_SPI_FLASH_STMICRO=y | ||||
| 47 | CONFIG_SPI_FLASH_SST=y | ||||
| 48 | CONFIG_SPI_FLASH_WINBOND=y | ||||
| Vipul Kumar | 603ca6d | 2018-01-24 10:51:30 +0530 | [diff] [blame] | 49 | CONFIG_PHY_MARVELL=y |
| 50 | CONFIG_PHY_REALTEK=y | ||||
| 51 | CONFIG_PHY_XILINX=y | ||||
| Michal Simek | 3d7285f | 2015-11-30 14:34:52 +0100 | [diff] [blame] | 52 | CONFIG_ZYNQ_GEM=y |
| Michal Simek | 8691e81 | 2017-11-02 10:40:57 +0100 | [diff] [blame] | 53 | CONFIG_DEBUG_UART_ZYNQ=y |
| 54 | CONFIG_DEBUG_UART_BASE=0xe0001000 | ||||
| 55 | CONFIG_DEBUG_UART_CLOCK=50000000 | ||||
| Michal Simek | ab75453 | 2017-11-06 09:16:05 +0100 | [diff] [blame] | 56 | CONFIG_ZYNQ_SERIAL=y |
| Bin Meng | 72a049d | 2015-11-25 05:34:53 -0800 | [diff] [blame] | 57 | CONFIG_ZYNQ_SPI=y |
| Jagan Teki | c6dca13 | 2015-08-31 17:38:40 +0530 | [diff] [blame] | 58 | CONFIG_ZYNQ_QSPI=y |