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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Stephen Warren45b8ae62012-08-05 16:07:21 +00002/*
3 * (C) Copyright 2012 Stephen Warren
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
Stephen Warren45b8ae62012-08-05 16:07:21 +00007 */
8
9#include <common.h>
10#include <asm/io.h>
11#include <asm/arch/wdog.h>
Alexander Graf3fce5342016-11-02 10:36:18 +010012#include <efi_loader.h>
Stephen Warren45b8ae62012-08-05 16:07:21 +000013
14#define RESET_TIMEOUT 10
15
Alexander Graf3fce5342016-11-02 10:36:18 +010016/*
17 * The Raspberry Pi firmware uses the RSTS register to know which partiton
18 * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
19 * Partiton 63 is a special partition used by the firmware to indicate halt.
20 */
21#define BCM2835_WDOG_RSTS_RASPBERRYPI_HALT 0x555
22
Paolo Pisati6213c552017-02-10 17:28:05 +010023/* max ticks timeout */
24#define BCM2835_WDOG_MAX_TIMEOUT 0x000fffff
25
Paolo Pisati6213c552017-02-10 17:28:05 +010026void hw_watchdog_disable(void) {}
Paolo Pisati6213c552017-02-10 17:28:05 +010027
Alexander Graf3fce5342016-11-02 10:36:18 +010028__efi_runtime_data struct bcm2835_wdog_regs *wdog_regs =
29 (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
30
Paolo Pisati6213c552017-02-10 17:28:05 +010031void __efi_runtime reset_cpu(ulong ticks)
Stephen Warren45b8ae62012-08-05 16:07:21 +000032{
Paolo Pisati6213c552017-02-10 17:28:05 +010033 uint32_t rstc, timeout;
34
35 if (ticks == 0) {
36 hw_watchdog_disable();
37 timeout = RESET_TIMEOUT;
38 } else
39 timeout = ticks & BCM2835_WDOG_MAX_TIMEOUT;
Stephen Warren45b8ae62012-08-05 16:07:21 +000040
Alexander Graf3fce5342016-11-02 10:36:18 +010041 rstc = readl(&wdog_regs->rstc);
Stephen Warren45b8ae62012-08-05 16:07:21 +000042 rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK;
43 rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET;
44
Paolo Pisati6213c552017-02-10 17:28:05 +010045 writel(BCM2835_WDOG_PASSWORD | timeout, &wdog_regs->wdog);
Alexander Graf3fce5342016-11-02 10:36:18 +010046 writel(BCM2835_WDOG_PASSWORD | rstc, &wdog_regs->rstc);
47}
48
49#ifdef CONFIG_EFI_LOADER
50
51void __efi_runtime EFIAPI efi_reset_system(
52 enum efi_reset_type reset_type,
53 efi_status_t reset_status,
54 unsigned long data_size, void *reset_data)
55{
56 u32 val;
57
Alexander Grafb7eefe42018-06-10 21:51:02 +020058 if (reset_type == EFI_RESET_COLD ||
59 reset_type == EFI_RESET_WARM ||
60 reset_type == EFI_RESET_PLATFORM_SPECIFIC) {
Alexander Graf3fce5342016-11-02 10:36:18 +010061 reset_cpu(0);
Alexander Grafb7eefe42018-06-10 21:51:02 +020062 } else if (reset_type == EFI_RESET_SHUTDOWN) {
Alexander Graf3fce5342016-11-02 10:36:18 +010063 /*
64 * We set the watchdog hard reset bit here to distinguish this reset
65 * from the normal (full) reset. bootcode.bin will not reboot after a
66 * hard reset.
67 */
68 val = readl(&wdog_regs->rsts);
69 val |= BCM2835_WDOG_PASSWORD;
70 val |= BCM2835_WDOG_RSTS_RASPBERRYPI_HALT;
71 writel(val, &wdog_regs->rsts);
72 reset_cpu(0);
Alexander Graf3fce5342016-11-02 10:36:18 +010073 }
74
75 while (1) { }
76}
77
Heinrich Schuchardt099b3b72018-03-03 15:28:59 +010078efi_status_t efi_reset_system_init(void)
Alexander Graf3fce5342016-11-02 10:36:18 +010079{
Heinrich Schuchardt099b3b72018-03-03 15:28:59 +010080 return efi_add_runtime_mmio(&wdog_regs, sizeof(*wdog_regs));
Stephen Warren45b8ae62012-08-05 16:07:21 +000081}
Alexander Graf3fce5342016-11-02 10:36:18 +010082
83#endif