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git01.mediatek.com / filogic / uboot / 03b98994d5b58a0e6e9701342d7743275b6afa8e / . / board / ivm / u-boot.lds
blob: f4c6c981a7f7123c2cfed4b2da7838146d8a2c6b [file] [log] [blame]
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]1/*
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]2 * (C) Copyright 2000-2010
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(powerpc)
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]25
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]26SECTIONS
27{
28 /* Read-only sections, merged into text segment: */
29 . = + SIZEOF_HEADERS;
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]30 .text :
31 {
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]32 arch/powerpc/cpu/mpc8xx/start.o (.text*)
33 arch/powerpc/cpu/mpc8xx/traps.o (.text*)
34
35 *(.text*)
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]36 }
37 _etext = .;
38 PROVIDE (etext = .);
39 .rodata :
40 {
Trent Piepho4438e5e2009-02-18 15:22:05 -0800[diff] [blame]41 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]42 }
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]43
44 /* Read-write section, merged into data segment: */
45 . = (. + 0x0FF) & 0xFFFFFF00;
46 _erotext = .;
47 PROVIDE (erotext = .);
48 .reloc :
49 {
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]50 KEEP(*(.got))
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]51 _GOT2_TABLE_ = .;
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]52 KEEP(*(.got2))
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]53 _FIXUP_TABLE_ = .;
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]54 KEEP(*(.fixup))
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]55 }
56 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
57 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
58
59 .data :
60 {
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]61 *(.data*)
62 *(.sdata*)
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]63 }
64 _edata = .;
65 PROVIDE (edata = .);
66
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]67 . = .;
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]68 __u_boot_cmd_start = .;
69 .u_boot_cmd : { *(.u_boot_cmd) }
70 __u_boot_cmd_end = .;
71
72
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]73 . = .;
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]74 __start___ex_table = .;
75 __ex_table : { *(__ex_table) }
76 __stop___ex_table = .;
77
78 . = ALIGN(256);
79 __init_begin = .;
80 .text.init : { *(.text.init) }
81 .data.init : { *(.data.init) }
82 . = ALIGN(256);
83 __init_end = .;
84
85 __bss_start = .;
Wolfgang Denk828a9782008-01-12 20:31:39 +0100[diff] [blame]86 .bss (NOLOAD) :
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]87 {
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]88 *(.bss*)
89 *(.sbss*)
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]90 *(COMMON)
Selvamuthukumard2454ba2008-10-16 22:54:03 +0530[diff] [blame]91 . = ALIGN(4);
wdenkb4e1a4b2002-01-13 00:10:35 +0000[diff] [blame]92 }
93 _end = . ;
94 PROVIDE (end = .);
95}