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Fabio Estevamadac83a2011-09-06 09:05:43 +00001/*
2 * (C) Copyright 2011 Freescale Semiconductor, Inc.
3 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Fabio Estevamadac83a2011-09-06 09:05:43 +00005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Fabio Estevamedfab052012-10-18 18:42:00 +000010#include <asm/arch/imx-regs.h>
11
Fabio Estevamadac83a2011-09-06 09:05:43 +000012/* High Level Configuration Options */
13
Fabio Estevam4294dc62012-10-23 06:34:48 +000014#define CONFIG_MX25
Fabio Estevamadac83a2011-09-06 09:05:43 +000015#define CONFIG_SYS_HZ 1000
16#define CONFIG_SYS_TEXT_BASE 0x81200000
Fabio Estevam1de48fa2012-10-23 06:34:49 +000017#define CONFIG_MXC_GPIO
Fabio Estevamadac83a2011-09-06 09:05:43 +000018
19#define CONFIG_DISPLAY_CPUINFO
20#define CONFIG_DISPLAY_BOARDINFO
21
22#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
23#define CONFIG_SETUP_MEMORY_TAGS
24#define CONFIG_INITRD_TAG
25
Fabio Estevamc333abd2011-09-22 08:07:15 +000026#define CONFIG_MACH_TYPE MACH_TYPE_MX25_3DS
27
Fabio Estevamadac83a2011-09-06 09:05:43 +000028/* Size of malloc() pool */
29#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
30
31/* Physical Memory Map */
32
33#define CONFIG_NR_DRAM_BANKS 1
34#define PHYS_SDRAM_1 0x80000000
35#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
36
37#define CONFIG_BOARD_EARLY_INIT_F
Fabio Estevam90c3aae2012-10-23 06:34:53 +000038#define CONFIG_BOARD_LATE_INIT
Fabio Estevamadac83a2011-09-06 09:05:43 +000039
40#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Fabio Estevamedfab052012-10-18 18:42:00 +000041#define CONFIG_SYS_INIT_RAM_ADDR IMX_RAM_BASE
42#define CONFIG_SYS_INIT_RAM_SIZE IMX_RAM_SIZE
43
44#define CONFIG_SYS_INIT_SP_OFFSET \
45 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
46#define CONFIG_SYS_INIT_SP_ADDR \
47 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
Fabio Estevamadac83a2011-09-06 09:05:43 +000048
49/* Memory Test */
50#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE/2)
51#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
52
Fabio Estevamadac83a2011-09-06 09:05:43 +000053/* Serial Info */
54#define CONFIG_MXC_UART
Stefano Babic1ca47d92011-11-22 15:22:39 +010055#define CONFIG_MXC_UART_BASE UART1_BASE
Fabio Estevamadac83a2011-09-06 09:05:43 +000056#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
57#define CONFIG_BAUDRATE 115200 /* Default baud rate */
Fabio Estevamadac83a2011-09-06 09:05:43 +000058
59/* No NOR flash present */
60#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
61#define CONFIG_ENV_SIZE (8 * 1024)
Fabio Estevamadac83a2011-09-06 09:05:43 +000062
63#define CONFIG_SYS_NO_FLASH
Fabio Estevam1de48fa2012-10-23 06:34:49 +000064#define CONFIG_ENV_IS_IN_MMC
65#define CONFIG_SYS_MMC_ENV_DEV 0
Fabio Estevamadac83a2011-09-06 09:05:43 +000066
67/* U-Boot general configuration */
68#define CONFIG_SYS_PROMPT "MX25PDK U-Boot > "
69#define CONFIG_AUTO_COMPLETE
70#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
71/* Print buffer sz */
72#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
73 sizeof(CONFIG_SYS_PROMPT) + 16)
74#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
75/* Boot Argument Buffer Size */
76#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
77#define CONFIG_CMDLINE_EDITING
78#define CONFIG_SYS_LONGHELP
79
80/* U-Boot commands */
81#include <config_cmd_default.h>
Fabio Estevamb3e3dad2012-12-11 11:48:46 +000082#define CONFIG_OF_LIBFDT
Fabio Estevamc6c373c2012-10-24 09:44:27 +000083#define CONFIG_CMD_BOOTZ
Fabio Estevamadac83a2011-09-06 09:05:43 +000084#define CONFIG_CMD_CACHE
Fabio Estevam1de48fa2012-10-23 06:34:49 +000085#define CONFIG_CMD_MMC
86#define CONFIG_CMD_EXT2
87#define CONFIG_CMD_FAT
Fabio Estevamadac83a2011-09-06 09:05:43 +000088
89/* Ethernet */
90#define CONFIG_FEC_MXC
91#define CONFIG_FEC_MXC_PHYADDR 0x1f
92#define CONFIG_MII
93#define CONFIG_CMD_NET
Fabio Estevamadac83a2011-09-06 09:05:43 +000094#define CONFIG_ENV_OVERWRITE
95
Fabio Estevam1de48fa2012-10-23 06:34:49 +000096/* ESDHC driver */
97#define CONFIG_MMC
98#define CONFIG_GENERIC_MMC
99#define CONFIG_FSL_ESDHC
100#define CONFIG_SYS_FSL_ESDHC_ADDR 0
101#define CONFIG_SYS_FSL_ESDHC_NUM 1
102
Fabio Estevam90c3aae2012-10-23 06:34:53 +0000103/* PMIC Configs */
Fabio Estevam592fd4e2012-12-11 04:58:02 +0000104#define CONFIG_POWER
105#define CONFIG_POWER_I2C
106#define CONFIG_POWER_FSL
Fabio Estevam90c3aae2012-10-23 06:34:53 +0000107#define CONFIG_PMIC_FSL_MC34704
108#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x54
109
Fabio Estevam1de48fa2012-10-23 06:34:49 +0000110#define CONFIG_DOS_PARTITION
111
Fabio Estevam90c3aae2012-10-23 06:34:53 +0000112/* I2C Configs */
113#define CONFIG_CMD_I2C
trem03997412013-09-21 18:13:36 +0200114#define CONFIG_SYS_I2C
115#define CONFIG_SYS_I2C_MXC
116#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */
Fabio Estevam90c3aae2012-10-23 06:34:53 +0000117
Benoît Thébaudeau44045552013-03-22 09:30:29 +0000118/* RTC */
119#define CONFIG_RTC_IMXDI
120#define CONFIG_CMD_DATE
121
Fabio Estevam90c3aae2012-10-23 06:34:53 +0000122/* Ethernet Configs */
123
124#define CONFIG_CMD_PING
125#define CONFIG_CMD_DHCP
126#define CONFIG_CMD_MII
127#define CONFIG_CMD_NET
128
Fabio Estevamde76a6a2012-11-16 05:09:08 +0000129#define CONFIG_BOOTDELAY 1
Fabio Estevamadac83a2011-09-06 09:05:43 +0000130
131#define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */
132#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
133
134#define CONFIG_EXTRA_ENV_SETTINGS \
135 "script=boot.scr\0" \
136 "uimage=uImage\0" \
137 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
138 "root=/dev/nfs " \
139 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
140 "bootcmd=run netargs; dhcp ${uimage}; bootm\0" \
141
142#endif /* __CONFIG_H */