wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2004 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * (C) Copyright 2001 |
| 6 | * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net |
| 7 | * |
| 8 | * (C) Copyright 2001 |
| 9 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 10 | * |
| 11 | * See file CREDITS for list of people who contributed to this |
| 12 | * project. |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or |
| 15 | * modify it under the terms of the GNU General Public License as |
| 16 | * published by the Free Software Foundation; either version 2 of |
| 17 | * the License, or (at your option) any later version. |
| 18 | * |
| 19 | * This program is distributed in the hope that it will be useful, |
| 20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 22 | * GNU General Public License for more details. |
| 23 | * |
| 24 | * You should have received a copy of the GNU General Public License |
| 25 | * along with this program; if not, write to the Free Software |
| 26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 27 | * MA 02111-1307 USA |
| 28 | */ |
| 29 | |
| 30 | #undef DEBUG |
| 31 | |
| 32 | #include <common.h> |
| 33 | #include <mpc8xx.h> |
| 34 | |
Wolfgang Denk | 6405a15 | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 35 | DECLARE_GLOBAL_DATA_PTR; |
| 36 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 37 | #ifndef CONFIG_SYS_OR_TIMING_FLASH_AT_50MHZ |
| 38 | #define CONFIG_SYS_OR_TIMING_FLASH_AT_50MHZ (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \ |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 39 | OR_SCY_2_CLK | OR_EHTR | OR_BI) |
| 40 | #endif |
| 41 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 42 | flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 43 | |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 44 | #if defined(CONFIG_ENV_IS_IN_FLASH) |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 45 | # ifndef CONFIG_ENV_ADDR |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 46 | # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 47 | # endif |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 48 | # ifndef CONFIG_ENV_SIZE |
| 49 | # define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 50 | # endif |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 51 | # ifndef CONFIG_ENV_SECT_SIZE |
| 52 | # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 53 | # endif |
| 54 | #endif |
| 55 | |
| 56 | /*----------------------------------------------------------------------- |
| 57 | * Protection Flags: |
| 58 | */ |
| 59 | #define FLAG_PROTECT_SET 0x01 |
| 60 | #define FLAG_PROTECT_CLEAR 0x02 |
| 61 | |
| 62 | /* Board support for 1 or 2 flash devices */ |
| 63 | #undef FLASH_PORT_WIDTH32 |
| 64 | #undef FLASH_PORT_WIDTH16 |
| 65 | #define FLASH_PORT_WIDTH8 |
| 66 | |
| 67 | #ifdef FLASH_PORT_WIDTH16 |
| 68 | #define FLASH_PORT_WIDTH ushort |
| 69 | #define FLASH_PORT_WIDTHV vu_short |
| 70 | #elif FLASH_PORT_WIDTH32 |
| 71 | #define FLASH_PORT_WIDTH ulong |
| 72 | #define FLASH_PORT_WIDTHV vu_long |
| 73 | #else /* FLASH_PORT_WIDTH8 */ |
| 74 | #define FLASH_PORT_WIDTH uchar |
| 75 | #define FLASH_PORT_WIDTHV vu_char |
| 76 | #endif |
| 77 | |
| 78 | #define FPW FLASH_PORT_WIDTH |
| 79 | #define FPWV FLASH_PORT_WIDTHV |
| 80 | |
| 81 | /*----------------------------------------------------------------------- |
| 82 | * Functions |
| 83 | */ |
| 84 | static ulong flash_get_size (FPWV * addr, flash_info_t * info); |
| 85 | static int write_data (flash_info_t * info, ulong dest, FPW data); |
| 86 | static void flash_get_offsets (ulong base, flash_info_t * info); |
| 87 | |
| 88 | /*----------------------------------------------------------------------- |
| 89 | */ |
| 90 | |
| 91 | unsigned long flash_init (void) |
| 92 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 93 | volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 94 | volatile memctl8xx_t *memctl = &immap->im_memctl; |
| 95 | unsigned long size_b0; |
| 96 | int i; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 97 | #ifdef CONFIG_SYS_OR_TIMING_FLASH_AT_50MHZ |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 98 | int scy, trlx, flash_or_timing, clk_diff; |
| 99 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 100 | scy = (CONFIG_SYS_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4; |
| 101 | if (CONFIG_SYS_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) { |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 102 | trlx = OR_TRLX; |
| 103 | scy *= 2; |
| 104 | } else |
| 105 | trlx = 0; |
| 106 | |
| 107 | /* We assume that each 10MHz of bus clock require 1-clk SCY |
| 108 | * adjustment. |
| 109 | */ |
| 110 | clk_diff = (gd->bus_clk / 1000000) - 50; |
| 111 | |
| 112 | /* We need proper rounding here. This is what the "+5" and "-5" |
| 113 | * are here for. |
| 114 | */ |
| 115 | if (clk_diff >= 0) |
| 116 | scy += (clk_diff + 5) / 10; |
| 117 | else |
| 118 | scy += (clk_diff - 5) / 10; |
| 119 | |
| 120 | /* For bus frequencies above 50MHz, we want to use relaxed |
| 121 | * timing (OR_TRLX). |
| 122 | */ |
| 123 | if (gd->bus_clk >= 50000000) |
| 124 | trlx = OR_TRLX; |
| 125 | else |
| 126 | trlx = 0; |
| 127 | |
| 128 | if (trlx) |
| 129 | scy /= 2; |
| 130 | |
| 131 | if (scy > 0xf) |
| 132 | scy = 0xf; |
| 133 | if (scy < 1) |
| 134 | scy = 1; |
| 135 | |
| 136 | flash_or_timing = (scy << 4) | trlx | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 137 | (CONFIG_SYS_OR_TIMING_FLASH_AT_50MHZ & ~(OR_TRLX | OR_SCY_MSK)); |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 138 | #endif |
| 139 | |
| 140 | /* Init: no FLASHes known */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 141 | for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 142 | flash_info[i].flash_id = FLASH_UNKNOWN; |
| 143 | } |
| 144 | |
| 145 | /* Static FLASH Bank configuration here - FIXME XXX */ |
| 146 | size_b0 = flash_get_size ((FPW *) FLASH_BASE0_PRELIM, &flash_info[0]); |
| 147 | |
| 148 | if (flash_info[0].flash_id == FLASH_UNKNOWN) { |
| 149 | printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", |
| 150 | size_b0, size_b0 << 20); |
| 151 | } |
| 152 | |
| 153 | /* Remap FLASH according to real size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 154 | #ifndef CONFIG_SYS_OR_TIMING_FLASH_AT_50MHZ |
| 155 | memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK); |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 156 | #else |
| 157 | memctl->memc_or0 = flash_or_timing | (-size_b0 & OR_AM_MSK); |
| 158 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 159 | memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_PS_8 | BR_MS_GPCM | BR_V; |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 160 | |
| 161 | /* Re-do sizing to get full correct info */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 162 | size_b0 = flash_get_size ((FPW *) CONFIG_SYS_FLASH_BASE, &flash_info[0]); |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 163 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 164 | flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]); |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 165 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 166 | #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 167 | /* monitor protection ON by default */ |
| 168 | (void) flash_protect (FLAG_PROTECT_SET, |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 169 | CONFIG_SYS_MONITOR_BASE, |
| 170 | CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 171 | &flash_info[0]); |
| 172 | #endif |
| 173 | |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 174 | #ifdef CONFIG_ENV_IS_IN_FLASH |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 175 | /* ENV protection ON by default */ |
| 176 | flash_protect (FLAG_PROTECT_SET, |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 177 | CONFIG_ENV_ADDR, |
| 178 | CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 179 | &flash_info[0]); |
| 180 | #endif |
| 181 | |
| 182 | flash_info[0].size = size_b0; |
| 183 | |
| 184 | return (size_b0); |
| 185 | } |
| 186 | |
| 187 | /*----------------------------------------------------------------------- |
| 188 | */ |
| 189 | static void flash_get_offsets (ulong base, flash_info_t * info) |
| 190 | { |
| 191 | int i; |
| 192 | |
| 193 | if (info->flash_id == FLASH_UNKNOWN) { |
| 194 | return; |
| 195 | } |
| 196 | |
| 197 | if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { |
| 198 | for (i = 0; i < info->sector_count; i++) { |
| 199 | info->start[i] = base + (i * 0x00020000); |
| 200 | } |
| 201 | } |
| 202 | } |
| 203 | |
| 204 | /*----------------------------------------------------------------------- |
| 205 | */ |
| 206 | void flash_print_info (flash_info_t * info) |
| 207 | { |
| 208 | int i; |
| 209 | |
| 210 | if (info->flash_id == FLASH_UNKNOWN) { |
| 211 | printf ("missing or unknown FLASH type\n"); |
| 212 | return; |
| 213 | } |
| 214 | |
| 215 | switch (info->flash_id & FLASH_VENDMASK) { |
| 216 | case FLASH_MAN_INTEL: |
| 217 | printf ("INTEL "); |
| 218 | break; |
| 219 | default: |
| 220 | printf ("Unknown Vendor "); |
| 221 | break; |
| 222 | } |
| 223 | |
| 224 | switch (info->flash_id & FLASH_TYPEMASK) { |
| 225 | case FLASH_28F320J3A: |
| 226 | printf ("28F320J3A\n"); |
| 227 | break; |
| 228 | case FLASH_28F640J3A: |
| 229 | printf ("28F640J3A\n"); |
| 230 | break; |
| 231 | case FLASH_28F128J3A: |
| 232 | printf ("28F128J3A\n"); |
| 233 | break; |
| 234 | default: |
| 235 | printf ("Unknown Chip Type\n"); |
| 236 | break; |
| 237 | } |
| 238 | |
| 239 | printf (" Size: %ld MB in %d Sectors\n", |
| 240 | info->size >> 20, info->sector_count); |
| 241 | |
| 242 | printf (" Sector Start Addresses:"); |
| 243 | for (i = 0; i < info->sector_count; ++i) { |
| 244 | if ((i % 5) == 0) |
| 245 | printf ("\n "); |
| 246 | printf (" %08lX%s", |
| 247 | info->start[i], |
| 248 | info->protect[i] ? " (RO)" : " "); |
| 249 | } |
| 250 | printf ("\n"); |
| 251 | return; |
| 252 | } |
| 253 | |
| 254 | /*----------------------------------------------------------------------- |
| 255 | */ |
| 256 | |
| 257 | |
| 258 | /*----------------------------------------------------------------------- |
| 259 | */ |
| 260 | |
| 261 | /* |
| 262 | * The following code cannot be run from FLASH! |
| 263 | */ |
| 264 | |
| 265 | static ulong flash_get_size (FPWV * addr, flash_info_t * info) |
| 266 | { |
| 267 | FPW value; |
| 268 | |
| 269 | addr[0] = (FPW) 0x00900090; |
| 270 | |
| 271 | value = addr[0]; |
| 272 | |
| 273 | debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value); |
| 274 | |
| 275 | switch (value) { |
| 276 | case (FPW) INTEL_MANUFACT: |
| 277 | info->flash_id = FLASH_MAN_INTEL; |
| 278 | break; |
| 279 | default: |
| 280 | info->flash_id = FLASH_UNKNOWN; |
| 281 | info->sector_count = 0; |
| 282 | info->size = 0; |
| 283 | addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ |
| 284 | return (0); /* no or unknown flash */ |
| 285 | } |
| 286 | |
| 287 | #ifdef FLASH_PORT_WIDTH8 |
| 288 | value = addr[2]; /* device ID */ |
| 289 | #else |
| 290 | value = addr[1]; /* device ID */ |
| 291 | #endif |
| 292 | |
| 293 | debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value); |
| 294 | |
| 295 | switch (value) { |
| 296 | case (FPW) INTEL_ID_28F320J3A: |
| 297 | info->flash_id += FLASH_28F320J3A; |
| 298 | info->sector_count = 32; |
| 299 | info->size = 0x00400000; |
| 300 | break; /* => 4 MB */ |
| 301 | |
| 302 | case (FPW) INTEL_ID_28F640J3A: |
| 303 | info->flash_id += FLASH_28F640J3A; |
| 304 | info->sector_count = 64; |
| 305 | info->size = 0x00800000; |
| 306 | break; /* => 8 MB */ |
| 307 | |
| 308 | case (FPW) INTEL_ID_28F128J3A: |
| 309 | info->flash_id += FLASH_28F128J3A; |
| 310 | info->sector_count = 128; |
| 311 | info->size = 0x01000000; |
| 312 | break; /* => 16 MB */ |
| 313 | |
| 314 | default: |
| 315 | info->flash_id = FLASH_UNKNOWN; |
| 316 | break; |
| 317 | } |
| 318 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 319 | if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 320 | printf ("** ERROR: sector count %d > max (%d) **\n", |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 321 | info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); |
| 322 | info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 323 | } |
| 324 | |
| 325 | addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ |
| 326 | |
| 327 | return (info->size); |
| 328 | } |
| 329 | |
| 330 | |
| 331 | /*----------------------------------------------------------------------- |
| 332 | */ |
| 333 | |
| 334 | int flash_erase (flash_info_t * info, int s_first, int s_last) |
| 335 | { |
| 336 | int flag, prot, sect; |
| 337 | ulong type, start, now, last; |
| 338 | int rcode = 0; |
| 339 | |
| 340 | if ((s_first < 0) || (s_first > s_last)) { |
| 341 | if (info->flash_id == FLASH_UNKNOWN) { |
| 342 | printf ("- missing\n"); |
| 343 | } else { |
| 344 | printf ("- no sectors to erase\n"); |
| 345 | } |
| 346 | return 1; |
| 347 | } |
| 348 | |
| 349 | type = (info->flash_id & FLASH_VENDMASK); |
| 350 | if ((type != FLASH_MAN_INTEL)) { |
| 351 | printf ("Can't erase unknown flash type %08lx - aborted\n", |
| 352 | info->flash_id); |
| 353 | return 1; |
| 354 | } |
| 355 | |
| 356 | prot = 0; |
| 357 | for (sect = s_first; sect <= s_last; ++sect) { |
| 358 | if (info->protect[sect]) { |
| 359 | prot++; |
| 360 | } |
| 361 | } |
| 362 | |
| 363 | if (prot) { |
| 364 | printf ("- Warning: %d protected sectors will not be erased!\n", |
| 365 | prot); |
| 366 | } else { |
| 367 | printf ("\n"); |
| 368 | } |
| 369 | |
| 370 | start = get_timer (0); |
| 371 | last = start; |
| 372 | /* Start erase on unprotected sectors */ |
| 373 | for (sect = s_first; sect <= s_last; sect++) { |
| 374 | if (info->protect[sect] == 0) { /* not protected */ |
| 375 | FPWV *addr = (FPWV *) (info->start[sect]); |
| 376 | FPW status; |
| 377 | |
| 378 | /* Disable interrupts which might cause a timeout here */ |
| 379 | flag = disable_interrupts (); |
| 380 | |
| 381 | *addr = (FPW) 0x00500050; /* clear status register */ |
| 382 | *addr = (FPW) 0x00200020; /* erase setup */ |
| 383 | *addr = (FPW) 0x00D000D0; /* erase confirm */ |
| 384 | |
| 385 | /* re-enable interrupts if necessary */ |
| 386 | if (flag) |
| 387 | enable_interrupts (); |
| 388 | |
| 389 | /* wait at least 80us - let's wait 1 ms */ |
| 390 | udelay (1000); |
| 391 | |
| 392 | while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 393 | if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 394 | printf ("Timeout\n"); |
| 395 | *addr = (FPW) 0x00B000B0; /* suspend erase */ |
| 396 | *addr = (FPW) 0x00FF00FF; /* reset to read mode */ |
| 397 | rcode = 1; |
| 398 | break; |
| 399 | } |
| 400 | |
| 401 | /* show that we're waiting */ |
| 402 | if ((now - last) > 1000) { /* every second */ |
| 403 | putc ('.'); |
| 404 | last = now; |
| 405 | } |
| 406 | } |
| 407 | |
| 408 | *addr = (FPW) 0x00FF00FF; /* reset to read mode */ |
| 409 | } |
| 410 | } |
| 411 | printf (" done\n"); |
| 412 | return rcode; |
| 413 | } |
| 414 | |
| 415 | /*----------------------------------------------------------------------- |
| 416 | * Copy memory to flash, returns: |
| 417 | * 0 - OK |
| 418 | * 1 - write timeout |
| 419 | * 2 - Flash not erased |
| 420 | * 4 - Flash not identified |
| 421 | */ |
| 422 | |
| 423 | int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) |
| 424 | { |
| 425 | ulong cp, wp; |
| 426 | FPW data; |
| 427 | |
| 428 | int i, l, rc, port_width; |
| 429 | |
| 430 | if (info->flash_id == FLASH_UNKNOWN) { |
| 431 | return 4; |
| 432 | } |
| 433 | /* get lower word aligned address */ |
| 434 | #ifdef FLASH_PORT_WIDTH16 |
| 435 | wp = (addr & ~1); |
| 436 | port_width = 2; |
| 437 | #elif defined(FLASH_PORT_WIDTH32) |
| 438 | wp = (addr & ~3); |
| 439 | port_width = 4; |
| 440 | #else |
| 441 | wp = addr; |
| 442 | port_width = 1; |
| 443 | #endif |
| 444 | |
| 445 | /* |
| 446 | * handle unaligned start bytes |
| 447 | */ |
| 448 | if ((l = addr - wp) != 0) { |
| 449 | data = 0; |
| 450 | for (i = 0, cp = wp; i < l; ++i, ++cp) { |
| 451 | data = (data << 8) | (*(uchar *) cp); |
| 452 | } |
| 453 | for (; i < port_width && cnt > 0; ++i) { |
| 454 | data = (data << 8) | *src++; |
| 455 | --cnt; |
| 456 | ++cp; |
| 457 | } |
| 458 | for (; cnt == 0 && i < port_width; ++i, ++cp) { |
| 459 | data = (data << 8) | (*(uchar *) cp); |
| 460 | } |
| 461 | |
| 462 | if ((rc = write_data (info, wp, data)) != 0) { |
| 463 | return (rc); |
| 464 | } |
| 465 | wp += port_width; |
| 466 | } |
| 467 | |
| 468 | /* |
| 469 | * handle word aligned part |
| 470 | */ |
| 471 | while (cnt >= port_width) { |
| 472 | data = 0; |
| 473 | for (i = 0; i < port_width; ++i) { |
| 474 | data = (data << 8) | *src++; |
| 475 | } |
| 476 | if ((rc = write_data (info, wp, data)) != 0) { |
| 477 | return (rc); |
| 478 | } |
| 479 | wp += port_width; |
| 480 | cnt -= port_width; |
| 481 | } |
| 482 | |
| 483 | if (cnt == 0) { |
| 484 | return (0); |
| 485 | } |
| 486 | |
| 487 | /* |
| 488 | * handle unaligned tail bytes |
| 489 | */ |
| 490 | data = 0; |
| 491 | for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { |
| 492 | data = (data << 8) | *src++; |
| 493 | --cnt; |
| 494 | } |
| 495 | for (; i < port_width; ++i, ++cp) { |
| 496 | data = (data << 8) | (*(uchar *) cp); |
| 497 | } |
| 498 | |
| 499 | return (write_data (info, wp, data)); |
| 500 | } |
| 501 | |
| 502 | /*----------------------------------------------------------------------- |
| 503 | * Write a word or halfword to Flash, returns: |
| 504 | * 0 - OK |
| 505 | * 1 - write timeout |
| 506 | * 2 - Flash not erased |
| 507 | */ |
| 508 | static int write_data (flash_info_t * info, ulong dest, FPW data) |
| 509 | { |
| 510 | FPWV *addr = (FPWV *) dest; |
| 511 | ulong status; |
| 512 | ulong start; |
| 513 | int flag; |
| 514 | |
| 515 | /* Check if Flash is (sufficiently) erased */ |
| 516 | if ((*addr & data) != data) { |
| 517 | printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr); |
| 518 | return (2); |
| 519 | } |
| 520 | /* Disable interrupts which might cause a timeout here */ |
| 521 | flag = disable_interrupts (); |
| 522 | |
| 523 | *addr = (FPW) 0x00400040; /* write setup */ |
| 524 | *addr = data; |
| 525 | |
| 526 | /* re-enable interrupts if necessary */ |
| 527 | if (flag) |
| 528 | enable_interrupts (); |
| 529 | |
| 530 | start = get_timer (0); |
| 531 | |
| 532 | while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame^] | 533 | if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) { |
wdenk | 0bbcbd2 | 2004-08-28 22:45:57 +0000 | [diff] [blame] | 534 | *addr = (FPW) 0x00FF00FF; /* restore read mode */ |
| 535 | return (1); |
| 536 | } |
| 537 | } |
| 538 | |
| 539 | *addr = (FPW) 0x00FF00FF; /* restore read mode */ |
| 540 | |
| 541 | return (0); |
| 542 | } |