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git01.mediatek.com / filogic / uboot / 8aee9358b0c08cfcf6c070318beac1e409b88a73 / . / cpu / pxa / usb.c
blob: aa6f4b7b9d15b940b3e44034e30b6a66b7f67ba9 [file] [log] [blame]
Markus Klotzbuecher98095512006-05-23 10:33:11 +0200[diff] [blame]1/*
2 * (C) Copyright 2006
3 * Markus Klotzbuecher, DENX Software Engineering <mk@denx.de>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
Markus Klotzbuecher98095512006-05-23 10:33:11 +0200[diff] [blame]25
Markus Klotzbuecher43c8b312006-11-27 11:44:58 +0100[diff] [blame]26#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
Rodolfo Giometti6659da82007-03-26 12:03:36 +0200[diff] [blame]27# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
Markus Klotzbuecherd0a38782006-05-23 13:38:35 +0200[diff] [blame]28
29#include <asm/arch/pxa-regs.h>
Jean-Christophe PLAGNIOL-VILLARDbce7b142007-10-19 10:55:24 +0200[diff] [blame]30#include <usb.h>
Markus Klotzbuecherd0a38782006-05-23 13:38:35 +0200[diff] [blame]31
Jean-Christophe PLAGNIOL-VILLARD733fc372007-10-19 08:10:15 +0200[diff] [blame]32int usb_cpu_init(void)
Markus Klotzbuecher98095512006-05-23 10:33:11 +0200[diff] [blame]33{
Rodolfo Giometti6659da82007-03-26 12:03:36 +0200[diff] [blame]34#if defined(CONFIG_CPU_MONAHANS)
Markus Klotzbuecher98095512006-05-23 10:33:11 +0200[diff] [blame]35 /* Enable USB host clock. */
36 CKENA |= (CKENA_2_USBHOST | CKENA_20_UDC);
37 udelay(100);
Rodolfo Giometti6659da82007-03-26 12:03:36 +0200[diff] [blame]38#endif
39#if defined(CONFIG_PXA27X)
40 /* Enable USB host clock. */
41 CKEN |= CKEN10_USBHOST;
42#endif
Markus Klotzbuecher98095512006-05-23 10:33:11 +0200[diff] [blame]43
Markus Klotzbuecher4a7847b2007-04-03 14:27:08 +0200[diff] [blame]44#if defined(CONFIG_CPU_MONAHANS)
Markus Klotzbuecher98095512006-05-23 10:33:11 +0200[diff] [blame]45 /* Configure Port 2 for Host (USB Client Registers) */
46 UP2OCR = 0x3000c;
Markus Klotzbuecher98095512006-05-23 10:33:11 +0200[diff] [blame]47#endif
48
49 UHCHR |= UHCHR_FHR;
50 wait_ms(11);
51 UHCHR &= ~UHCHR_FHR;
52
53 UHCHR |= UHCHR_FSBIR;
54 while (UHCHR & UHCHR_FSBIR)
55 udelay(1);
56
Rodolfo Giometti6659da82007-03-26 12:03:36 +0200[diff] [blame]57#if defined(CONFIG_CPU_MONAHANS)
Markus Klotzbuecher98095512006-05-23 10:33:11 +0200[diff] [blame]58 UHCHR &= ~UHCHR_SSEP0;
Rodolfo Giometti6659da82007-03-26 12:03:36 +0200[diff] [blame]59#endif
60#if defined(CONFIG_PXA27X)
61 UHCHR &= ~UHCHR_SSEP2;
62#endif
Markus Klotzbuecher98095512006-05-23 10:33:11 +0200[diff] [blame]63 UHCHR &= ~UHCHR_SSEP1;
64 UHCHR &= ~UHCHR_SSE;
65
66 return 0;
67}
68
Jean-Christophe PLAGNIOL-VILLARD733fc372007-10-19 08:10:15 +0200[diff] [blame]69int usb_cpu_stop(void)
Markus Klotzbuecher98095512006-05-23 10:33:11 +0200[diff] [blame]70{
Rodolfo Giomettidae6b7a2007-10-15 11:59:17 +0200[diff] [blame]71 UHCHR |= UHCHR_FHR;
72 udelay(11);
73 UHCHR &= ~UHCHR_FHR;
74
75 UHCCOMS |= 1;
76 udelay(10);
77
78#if defined(CONFIG_CPU_MONAHANS)
79 UHCHR |= UHCHR_SSEP0;
80#endif
81#if defined(CONFIG_PXA27X)
82 UHCHR |= UHCHR_SSEP2;
83#endif
84 UHCHR |= UHCHR_SSEP1;
85 UHCHR |= UHCHR_SSE;
86
Markus Klotzbuecheraa219212006-05-30 16:56:14 +0200[diff] [blame]87 return 0;
88}
Markus Klotzbuecher98095512006-05-23 10:33:11 +0200[diff] [blame]89
Jean-Christophe PLAGNIOL-VILLARD733fc372007-10-19 08:10:15 +0200[diff] [blame]90int usb_cpu_init_fail(void)
Markus Klotzbuecheraa219212006-05-30 16:56:14 +0200[diff] [blame]91{
Rodolfo Giometti6416a732007-10-15 11:59:17 +0200[diff] [blame]92 UHCHR |= UHCHR_FHR;
93 udelay(11);
94 UHCHR &= ~UHCHR_FHR;
95
96 UHCCOMS |= 1;
97 udelay(10);
98
99#if defined(CONFIG_CPU_MONAHANS)
100 UHCHR |= UHCHR_SSEP0;
101#endif
102#if defined(CONFIG_PXA27X)
103 UHCHR |= UHCHR_SSEP2;
104#endif
105 UHCHR |= UHCHR_SSEP1;
106 UHCHR |= UHCHR_SSE;
107
Markus Klotzbuecher98095512006-05-23 10:33:11 +0200[diff] [blame]108 return 0;
109}
Markus Klotzbuecheraa219212006-05-30 16:56:14 +0200[diff] [blame]110
Rodolfo Giometti6659da82007-03-26 12:03:36 +0200[diff] [blame]111# endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X) */
Markus Klotzbuecherd0a38782006-05-23 13:38:35 +0200[diff] [blame]112#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */